# Aditya Somani > System Software @ NVIDIA | MBA Candidate at UC Berkeley Location: San Mateo, California, United States Profile: https://flows.cv/adityasomani Currently working in system software development for kernel mode driver software for NVIDIA GPUs. Previously worked in ASIC Design Verification for various NVIDIA GPU IPs and worked at SunOracle in FPGA Prototyping/Emulation Platform development. MBA Candidate at UC Berkeley Haas School of Business with focus in Go-to-Market, Operations and Corporate Strategy. Master's in Electrical and Computer Engineering with a focus in Computer Architecture, VLSI Design. Bachelor's in Electrical Engineering with a focus in OS Design, Computer Architecture, Embedded and Control Systems. ## Work Experience ### Senior System Software Engineer @ NVIDIA Jan 2024 – Present | Santa Clara, California, United States ### Sr. ASIC Verification Engineer @ NVIDIA Jan 2017 – Jan 2024 | Santa Clara, California, United States Working on state-of-the-art ASIC design verification for various applications such as datacenter, automotive, robotics. ### Member Board of Directors @ Automation Engineers A.B. Pvt ltd. Jan 2021 – Present | New Delhi, Delhi, India ### Hardware Developer @ Oracle Jan 2016 – Jan 2017 | San Francisco Bay Area Worked at FPGA based emulation platform development to provide early access to in-development next-gen computer hardware for ongoing software/hardware development and testing. ### Graduate Teaching Assistant @ Georgia Institute of Technology Jan 2015 – Jan 2016 Lead two sections of 20 students for a sophomore level digital design course in state machine design and FPGA prototyping. Conducted 1-on-1 consultations with students and provided help with IEEE styled technical reports. Supervised and graded final project demos and presentations. ### Co Founder @ Ample Biometrics Jan 2014 – Jan 2015 Ample is the industry's first plug and play, standalone vein scanner that has been designed from the ground up for the masses and can be applied to a multitude of identify related problems. By building a complete hardware-software system, we strive to provide a biometrics service that can be truly widespread across multiple industries. We are integrating the advanced concept of vein-scanning with simple software so that anyone from corporations to students can integrate the power of secure biometrics into their own applications. ### Hardware Engineering Intern @ Cytilife Inc. Jan 2015 – Jan 2015 Cytilife is a small start-up based in Atlanta which aims to reduce inefficiencies in everyday life by combining the concepts of Artificial Intelligence, Sensory Network and Data Collection. The mobile application behind the system acts as an on the fly dynamic scheduler which uses its ground-breaking design to provide students a healthier lifestyle. I worked on the sensors aspect of Cytilife, evaluating from hundreds of sensors to provide a low cost network of BLE based beacons which can be used to locate users within an accuracy of 1m. I subsequently also designed a custom sensor for the team. I also helped create the user interface, front-end and back end of the application including components such as iOS development, data analysis and recommender systems. ### Undergraduate Research Assistant @ Georgia Institute of Technology Jan 2015 – Jan 2015 Working with Dr. Hadi Esmaeilzadeh who heads the Alternative Computing Technologies (ACT) Lab at Georgia Tech. Our team is currently implementing a Neural-Network based Processing Unit specialized for high-throughput applications such as GPU operations or other applications requiring SIMD execution. We are using a Zynq-7000 series SoC to facilitate a tight coupling of the processing subsystem with the FPGA fabric. ### Lead Undergraduate Teaching Assistant @ Georgia Institute of Technology Jan 2013 – Jan 2015 Lead Undergraduate Teaching Assistant for ECE 2031 - Digital Design Laboratory. In-charge of all lab activities within the section including lab equipment as well as lab activities of student. Experienced mentor for 20 undergraduates per section enrolled in the class helping them perform their lab activities as well as check them off on the same. Lab activities include basic digital circuits, state machines and a simple computer in VHDL. Undergraduate Teaching Assistant for ECE 3043 - Microelectronic Circuits Lab. Mentor for undergraduates enrolled in the class helping them perform their lab activities as well as check them off on the same. Lab Activities include design of first and second order filters, oscillators and BJT/MOSFET based amplifiers. ### Networks Research Intern @ NTT (Nippon Telegraph and Telephone Corporation) Jan 2014 – Jan 2014 Designed and implemented simulators based in C for control schemes in Large Scale Optical Networks as a Research Intern at the Network Service Systems Laboratory @ NTT Musashino, Japan. This included the creation of novel control schemes for use in Wavelength/Time Division Multiplexing based all-optical ring networks. I worked specifically on two separate projects i.e. Efficient Data Transfer using Path Grouping and Control Data Minimization using Mediation Nodes. Control Data Minimization - We achieved a 62% reduction in control bandwidth utilization and a 2x increase in network scalability. Path Grouping - 70% decrease in reconfiguration times and 2.5x increase in network scalability. ### Undergraduate Research Assistant @ Georgia Institute of Technology Jan 2012 – Jan 2012 Leader of the Concepts Refinement Team at Georgia Tech Vertically Integrated Project's Intelligent Tutoring System Project. The project was lead by Dr. James H. McClellan and the system was utilized for his Introduction to Digital Signal Processing class at Georgia Tech. I brainstormed, analysed and implemented the complete redesign of the internal concepts in the system database. I also created additional questions and warm-up modules for the system. ### Project Management Intern @ Automation Engineers A.B. Pvt. Ltd. (Solution Partner Siemens India) Jan 2012 – Jan 2012 Programmed a Excel and Visual Basic based Project Management interface suited for handling multiple concurrent projects with shared resources and customized to suit AEAB's project needs. The project management interface was designed so as to automatically point out excess manpower requirement in the future as well as suggest alternate plans to avoid the problem. Created documents and presentations to facilitate quick habilitation of new hires in the company and also implemented a DataMatrix based labelling system within the company's existing ERP system. ## Education ### Master of Business Administration - MBA University of California, Berkeley Jan 2023 – Jan 2026 ### Master of Science (M.S.) in Electrical and Computer Engineering Georgia Institute of Technology Jan 2015 – Jan 2016 ### Bachelor of Science (B.S.) in Electrical and Computer Engineering w/ CS Minor Georgia Institute of Technology Jan 2011 – Jan 2015 ### High School Graduation in Physics, Chemistry, Mathematics, Computer Science Delhi Public School - R. K. Puram Jan 2004 – Jan 2011 ## Contact & Social - LinkedIn: https://linkedin.com/in/adityasomani --- Source: https://flows.cv/adityasomani JSON Resume: https://flows.cv/adityasomani/resume.json Last updated: 2026-03-23