# Alexander Guarin > Senior Staff PCB Designer | High-Density, Rigid-Flex, and Production Hardware Location: Livermore, California, United States Profile: https://flows.cv/alexanderguarin I am a Senior Staff PCB Designer focused on delivering complex, high-density printed circuit boards for production hardware. My work centers on board-level layout execution, including stackup definition, controlled-impedance routing, constraint management, and design-for-manufacturing practices. I have supported hardware programs spanning semiconductor test, precision instrumentation, optics-based platforms, and silicon-photonics validation systems. I work closely with electrical, mechanical, and manufacturing teams, as well as fabrication and assembly partners, to deliver robust, manufacturable designs. IPC Certified Interconnect Designer (CID, CID+) and Certified Printed Circuit Designer (CPCD). ## Work Experience ### Layout Engineer & PCB Librarian @ Ayar Labs Jan 2025 – Present | San Jose, California, United States Supported development of PCB hardware for validation of silicon photonics–based I/O solutions, including optical chiplets and multi-wavelength remote light sources. • Designed and laid out multilayer PCB hardware for chip and system validation, supporting bring-up and testing of photonics-based I/O infrastructure. • Established PCB library workflow, created component footprints, and maintained library revision documentation to support traceable hardware development. ### Manager PCB Design @ Topcon Positioning Systems Jan 2022 – Jan 2024 | Livermore, California, United States Provided hands-on technical leadership for complex PCB layout efforts, establishing layout standards, design practices, and review processes to ensure consistent, high-quality execution across production designs. • Defined PCB stackups with controlled impedance modeling, grounding, and power distribution considerations in collaboration with engineers and fabrication vendors. • Oversaw release documentation for rigid, flex, and HDI designs, including fabrication and assembly outputs. • Designed and maintained Altium libraries aligned with Arena, improving BOM accuracy, part reuse, and procurement and manufacturing coordination. • Migrated Altium Concord Pro to A365, unifying tool usage and enabling global collaboration. • Developed layout templates and lightweight JIRA workflows to streamline PCB design intake and documentation. ### Senior PCB Designer @ Topcon Positioning Systems Jan 2017 – Jan 2022 | Livermore, California, United States Designed high-speed, high-reliability PCBAs for precision positioning systems and optics-based platforms. • Developed stackups and routing strategies for impedance-controlled differential pairs across HDI and rigid-flex designs. • Delivered release packages with fabrication and assembly drawings and BOMs to support production builds. • Migrated component data from OrCAD CIS to Altium, ensuring continuity of sourcing and Arena part data. • Cut prototype lead time from 16 weeks to 3 weeks through early sourcing coordination and vendor engagement. ### PCB Designer @ Topcon Positioning Systems Jan 2006 – Jan 2017 | Livermore, California, United States Designed PCBAs for electro-hydraulic control systems with integrated GPS and positioning technologies. • Introduced first flex assembly for GX-60 display, replacing cabling to improve manufacturability and reduce complexity. • Integrated SolidWorks 3D models into ECAD libraries to improve electro-mechanical fit and consistency. • Integrated assembly drawings into PADS workflow, reducing manual effort and errors. • Led multiple concurrent PCB projects from concept through production release. ### Senior PCB Design Engineer @ Ultratech - a Division of Veeco Jan 2004 – Jan 2005 | San Jose, California, United States Designed printed circuit boards for semiconductor wafer laser processing and metrology systems. • Developed analog and mixed-signal PCB layouts optimized for low-noise performance. • Authored an internal design reference guide adopted across the engineering team. ### Project Leader, Senior Electrical Design Engineer @ FormFactor Inc. Jan 2001 – Jan 2004 | Livermore, California, United States Led production design of probe cards for DRAM, Flash, and C4 microprocessor on-wafer testing applications. • Delivered probe cards meeting tight mechanical tolerances and high-speed timing constraints for production testing. • Earned lead design responsibility for C4 microprocessor probe cards following successful production releases for major semiconductor customers. • Implemented a 10-point improvement plan for C4 Design Studio CAD tools, reducing design cycle time and improving workflow efficiency. • Standardized project onboarding through feasibility analyses and design checklists, improving predictability and execution quality. • Authored technical documentation for Intel outlining ceramic array design limitations and integration considerations. ## Education ### Bachelor of Science in Electronics Engineering Technology DeVry University ## Contact & Social - LinkedIn: https://linkedin.com/in/alex-guarin --- Source: https://flows.cv/alexanderguarin JSON Resume: https://flows.cv/alexanderguarin/resume.json Last updated: 2026-04-13