Part of a team responsible for design and development of cutting-edge products and solutions related to Video Wall Processing and Distribution System, comprising of clusters of Encoder and Decoder/Display Devices. Research and identify Technologies and Media Frameworks. Evaluate and drive new product/feature initiatives. Closely work and collaborate with cross-functional teams such as Product Marketing, Hardware, UI and QA to understand product requirements and resolve issues.

Design and Development of a NVIDIA Pascal GPU based Medium Wall Product on Ubuntu Linux.

• Implementation of media player in C/C++, to playback rtsp streams and display them on a video wall surface. Demux the stream using FFMPEG libraries/api’s, decode video on GPU using NVDECODE API/SDK based hardware acceleration, and render audio/video using OpenGL/X11, Pulse Audio.

• Implement communication layer in the media player to accept commands and control messages over Unix Domain Sockets and JSON, to control and configure the media pipeline.

• Implement middleware in Java to report wall and system configuration, create and manage windows using XWindows, route and manage IP sources onto the windows, manage licenses, software upgrade, monitor system load, manage media player instances etc.

• Implement WebView feature using Chromium browser embedded framework, to display browser windows on Video Wall surface.

3. Design and development of a Large Video Wall Product based on multiple PCIe Encoder and Decoder Cards on a Host System. Responsible for developing a Controller in Java, to control, route, and manage input sources to the system (Both RTSP based video stream and baseband input), window geometry/rendering and other encoder, decoder and display characteristics, manage the PCIe Cards. Implemented complex algorithms to validate geometry of display wall surfaces.

. Development of a Xilinx Zynq UltraScale+ MPSoC based AV Encoder & Decode/Display product using Xilinx Petalinux/Yocto.

Responsible for designing and implementing GSTREAMER Audio/Video Pipelines in normal & low latency modes for Encoding and Decoding, capable of receiving baseband video over multiple HDMI Inputs, encoding video in h264/h265 codecs in HD/UHD@60fps and streaming it out to IP network over RTSP/RTP/MPEG2TS/ES, also capable of Decoding and Displaying the RTSP/RTP Streams on multiple HDMI Outputs in Multiviewer and Video Wall Configurations, in C/C++, based on gstreamer API’s and Xilinx Tools, using hardware accelerated encoding/decoding.

Implement Middle ware in Java, which interfaces with frontend user facing modules over WebSockets/JSON and Native AV apps and Linux driver modules using JNI/JNA/Unix IPC. Interface with SQLite DB using JDBC, implement licensing feature using Java Licensing Library.

• Implement a Java Module for provisioning of the device in production environment by programming HDCP Keys and Board Specific Information into NVRAM, configuring MAC address, perform firmware upgrade.

• Implement HDCP over IP based DRM Module in Java and Native video pipeline in C/C++, for key exchanges between Encoder and Decoder devices, encryption/decryption of the Video PES payload using Xilinx HW Crypto block/AES 256 encryption/decryption.

As a part of Dolby Vision Group, working on development of Next Generation Professional Reference HDR 4k Display, capable of peak brightness of upto 8000 nits and near 100% REC.2020 Color Gamut, for Mastering Content in Dolby Vision.

Worked on Design and Development of following Software/Firmware Modules in C/C++ and Nvidia CUDA

• - Implementation of Dual Modulation Algorithm for Image Processing on Nvidia GPGPU/CUDA to drive backlight LED and LCD Display controller over Display Port

• - Implementation of Input Capture Module to capture video over 12G-SDI interface using PCIe based Capture Cards and SDK.

• - Implementation of Input Video Pipeline on Multicore CPU/GPU for image format conversion, up-scaling, applying Brightness, Contrast, Gain, Hue and Saturation settings, Input Range settings, White Point and Color Gamut settings on Nvidia GPGPU/CPU, using low latency, multithreaded, Video Buffer Management scheme.

• - Integrate NVIDIA Quadro Sync Solution and Nvidia Control APIs, to achieve Frame Lock Sync between VIdeo Input and Display Port Output in the Video Pipeline

• - Design and Bring up of PSoC firmware on LCD Controller board as well as Backlight Unit Boards using Cypress PSoC Creator.

• - Implementation of 2-Way USB Full Speed communication interface between the Linux based Host and Cypress uC PSoC based BLU board to drive backlight LEDs and achieve LED-LCD Sync, dynamic fan speed control and other command/control functions.

• - Implementation of Cursors, Markers, Blanker, Gamut Filters and other On Screen Display Features using NVIDIA CUDA and OpenGL/X11 interface.

• - Implementation of a Remote Control iOS App in Swift to command and control the Display using Apple Bonjour Discovery mechanism and REST APIs.

• - Implementation of Backend Software to accept command and control and drive the core algorithm, using Node.js Server Engine and REST APIs.

As a part of final project, implemented a Real Time CCTV Camera Monitoring Application on embedded ARM Linux based NVIDIA Jetson TX2 Platform. Trained the Algorithm using Inception-ResnetV2 CNN Architecture, TensorFlow Framework and ImageNet Dataset Implemented notification service for iOS devices using Node.js, and Apple Push Notification Service to issue real time alerts on iOS devices. Implemented a small iOS App in Swift to demonstrate end to end completeness of the solution. More details at:

http://cs229.stanford.edu/proj2017/final-reports/5234577.pdf,

http://cs229.stanford.edu/proj2017/final-posters/5133020.pdf