# Armelle Laine > Engineering Manager - Android Platform Security Location: San Francisco, California, United States Profile: https://flows.cv/armelle Android Platform Security, Secure Firmware (Trusty TEE, ARM TF-A, AVF) VR/AR SW API standardisation (Khronos OpenXR™) Model-Based Design Flow with SysML/SystemC CPU SubSystem Architecture, Coprocessor Interface, HW/SW Partitioning, smart DMAs ## Work Experience ### Staff Software Engineer @ Google Jan 2021 – Present | Mountain View, California, United States ### Autonomous Vehicle Software Architect @ Aptol Systems Inc. Jan 2019 – Jan 2021 | Menlo Park ### Principal Engineer Mgr @ Qualcomm Jan 2017 – Jan 2018 | Greater San Diego Area Part of the Virtual Reality Systems team at Qualcomm: - Developed the low-latency camera capture solution for Snapdragon VR eye-tracking solution. - Standing as the Qualcomm representative for Khronos OpenXR working group. ### Senior Staff System Engineer @ Qualcomm Jan 2016 – Jan 2017 | Greater San Diego Area Part of the Virtual Reality Systems team at Qualcomm: - Leading the VR Performance and Power analysis, creating tools and workflow for optimization of CPU/GPU/DSP workloads and critical VR processing latencies such as Motion to Photon. - Standing as Qualcomm representative at Khronos OpenXR working group. ### Senior Staff Engineer, Mgr @ Qualcomm Jan 2011 – Jan 2016 | San Diego Virtual Platform Architecture and Performance. SystemC / SysMl. ### IPA Systems Engineer @ Qualcomm Jan 2008 – Jan 2011 ### Senior Staff Engineer - Platform Architecture @ Nextwave Broadband Jan 2007 – Jan 2009 ### Senior System Architect @ Texas Instruments Jan 2004 – Jan 2007 Wireless Handset Platform System Architecture, performance modeling. ### OMAP Symbian SW Development Lead @ Texas Instruments Jan 2001 – Jan 2003 Symbian Multimedia acceleration, ARM & DSP peer SW component architecture and development lead. Direct Line Management of 7 engineers for 1 year. ### Application Engineer for Base Transceiver Station @ Texas Instruments Jan 1996 – Jan 2001 Architecture of DSP platforms for 2G and UMTS Base Transceiver Station (include SW benchmarking, memory sub-system definition, DMA specification, Viterbi/Turbo co-processors). ## Education ### MSEE in Electronics and Signal Processing ENSEEIHT ## Contact & Social - LinkedIn: https://linkedin.com/in/armelle-laine-689b711 --- Source: https://flows.cv/armelle JSON Resume: https://flows.cv/armelle/resume.json Last updated: 2026-04-12