# Camille Boucher-Veronneau > Staff Software Engineer / TLM at Google Location: Los Altos, California, United States Profile: https://flows.cv/camilleboucherveronneau ## Work Experience ### Staff Software Engineer @ Google Jan 2018 – Present | San Francisco Bay Area Search Quality (12-2021 - present) 08-2023 - Now focusing on AI overview for commercial research. - Also working on improving core ranking for forums and utilizing forums effectively in AI applications. - I also lead a team working on commercial journeys including how to determine if review documents are high quality (https://developers.google.com/search/docs/specialty/ecommerce/write-high-quality-reviews). 12-2021 to 08-2023: - Core web ranking on commercial queries (plumbers near me, kids summer camp, restaurants, etc). Display Ads Quality Team (02-2018 to 12-2021) 10-2020 to 12-2021: - TLM of the Content Ads Criteria Suggestion and Segment Generation team. - Directly manage 6 engineers and responsible for setting the technical direction. - My team is responsible for suggesting the right audiences an advertiser should target based on semantic and performance signals coupled with machine-learning-based models and expansions. - We are also responsible for generating custom audience segments. 02-2018 to 10-2020: - Senior Software Engineer focused on improving DV360 advertisers' reach on apps. - Designed and launched personalized website and app placement suggestions to add to existing channels (https://support.google.com/displayvideo/answer/2717490?hl=en). One of two engineers who coded the implementation. - Uncovered and fixed many issues which were limiting app reach and/or being resource inefficient leading to significant spend increase on apps for DV3 advertisers. ### Software Engineering Manager @ Intel Corporation Jan 2015 – Jan 2018 | San Francisco Bay Area • My team was responsible for the Analysis and Synthesis engine, a key and critical part of the Quartus Compiler. The engine parses the user design and translates it into a set of logic blocks while performing optimizations to minimize the circuit's area and delay. • Technical manager to eight engineers ranging from new college graduates to principal engineers. • Responsible for both defining and implementing customer-visible features and developing back-end optimizations to improve quality of results (QoR). • Quickly address, resolve and patch critical customer issues. • In the past 2 years, the team met aggressive goals. The team delivered 5% maximum frequency (fmax) improvement through brand new optimization algorithms. Major infrastructure improvement led to over 25% runtime reduction on incremental compiles. ### Member of Technical Staff, Software Engineering @ Altera Jan 2012 – Jan 2015 | San Francisco Bay Area Member of the Logic Synthesis Team Member of Technical Staff, Software Engineering, 2014-2015 Senior Software Engineer, 2012-2014 Altera was acquired by Intel in 2015. • Responsible for the integration of a new parser from a third-party vendor into the engine to provide much improved System Verilog and VHDL 2008 support. This was done with minimal disruption to the existing production flow and by keeping the external API’s similar. • Worked with customers, field application engineers, internal IP developers, as well as the vendor to ensure each of them make the required changes to ensure successful adoption of the new parser. • Finished complete rewrite of the compiler flow-control infrastructure. • Worked on parallelization of the synthesis engine, through a multi-process automatic partitioning approach which led to a 30% runtime improvement. ### Ph.D. Candidate @ Stanford University and SLAC National Accelerator Laboratory Jan 2007 – Jan 2012 • Completed a calculation at the two-loop level (second order in quantum correction), which will lead to a better understanding of quantum gravity. • Provided additional evidence for a novel duality between gauge-theory and gravity amplitudes following from group-theoretic properties. • Independently of my advisor, initiated collaborations with scientists from other universities and with a fellow student, each leading to a publication. • Invited to discuss my work during workshops at UC Santa Barbara and at the University of Michigan. Presented numerous seminars at SLAC and Stanford. ### Supervisor and Mentor @ Stanford University and SLAC National Accelerator Laboratory Jan 2011 – Jan 2011 • Supervised a high-school student from an underprivileged background working on a CS-related research project. • Wrote the project proposal, reviewed the applications and interviewed candidates. • The intern presented the project results at a conference. ### Teaching Assistant @ Stanford University and SLAC National Accelerator Laboratory Jan 2007 – Jan 2008 • Taught lab and tutorial sections to a total of over 200 students from varied backgrounds. • Consistently maintained above average section attendance and positive student evaluations. ### Research Assistant @ Université de Montréal, University of Kent (Canterbury, UK) and TRIUMF (Vancouver, BC) Jan 2004 – Jan 2005 • Studied non-commutative Maxwell-Chern-Simons theory at U de Montréal and at U of Kent. • At TRIUMF, modeled the TWIST experiment solenoid magnetic field using the Opera electromagnetic modeling toolsuite. Presented results at a collaboration meeting and at a national conference. ## Education ### Ph.D. in Physics Stanford University ### M.Sc. in Physics University of Waterloo ### B.Sc. in Physics, Mathematics Université de Montréal ## Contact & Social - LinkedIn: https://linkedin.com/in/camille-boucher-veronneau-541a8640 --- Source: https://flows.cv/camilleboucherveronneau JSON Resume: https://flows.cv/camilleboucherveronneau/resume.json Last updated: 2026-04-12