# Chang Lin

> ASIC Design Lead at SM Technology

Location: San Francisco Bay Area, United States
Profile: https://flows.cv/changlin

Detail-oriented and excellent problem solver with 15 years of proven track record in ASIC/Media SoC/IP development. Strong hands on experience in all front-end ASIC design flows that range from micro-architecture, RTL design and implementation, CDC, FEV, synthesis, GLS, DFT, timing closure, backend signoff, test vector generation, tester support and chip bring-up.

• Developed Perl script to automate linting check for turn-in in SVN environment.
• Designed DMA engine that can handle linear to linear and linear to tile data transfer with support of 3 different pixel formats.
• Developed AXI arbitration unit with 2 level round robin priority scheme to maximize system performance. It has built-in synchronization fifo to facilitate requester from different clock domain.
• Performed metal fixes on PCIe gate netlist to move from Gen3 -> Gen2 to fix a system design bug and passed PCIe compliance test.
• Set up Gate Level Simulation environment and caught multiple critical bugs to achieve fully functional chip in 1st tapeout.
• Developed Intel’s 1st HDMI Receiver from scratch.
• Led DDR controller team to reduce active power by 30% and develop new arbitration scheme favoring same page request to improve throughput by 6%.
• Owner of entire micro-architecture of Xscale intelligent bridge, optimize across performance/power/area and achieve 700Mhz, results in A-step PRQ.
• Hold multiple patents in circuit and logic designs. Provided guidance to the team in multi-clock domain design and DFT implementation.

## Work Experience
### ASIC Design Manager @ EV Startup
Jan 2021 – Present | Santa Clara, California, United States
Led a team of 3 designing high performance DMA with 4k crossing prevention and read data count checking and write response tracking.  It also covers complex data unpack and packing.  A unique data unfolding scheme is used for data packing.

### ASIC Design Lead @ SM Technology
Jan 2017 – Jan 2021 | Milpitas, California, United States


## Education
### Master's degree in Electrical and Electronics Engineering
University of Utah

### Bachelor's degree in Electrical and Electronics Engineering
Feng Chia University


## Contact & Social
- LinkedIn: https://linkedin.com/in/chang-lin-2a469a169

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Source: https://flows.cv/changlin
JSON Resume: https://flows.cv/changlin/resume.json
Last updated: 2026-04-13