# Chuck Zhao

> Software Engineer,Meta/Facebook

Location: Hayward, California, United States
Profile: https://flows.cv/chuckzhao

A senior compiler/performance researcher and developer with 10+ years experience and a Ph.D. degree in optimizing and parallelizing compiler. Focus on performance improvements over both sequential and parallel applications. Recent interests are on parallel execution and scaling of key workloads over homogeneous and heterogeneous architectures,  including multi-core CPUs, multiple GPUs, and Machine Learning (ML)/Artificial Intelligence (AI) accelerators.

## Work Experience
### Software Engineer @ Meta Facebook
Jan 2023 – Present | Menlo Park, California, United States
Machine Learning/Deep Learning/AI over Meta Training/Inference Accelerator (MTIA):
- Machine Learning (ML) Software Stack Production
- Machine Learning (ML) Compiler Optimizations
- ML Model Analysis, Performance Optimizations, and Launch

### Principal Compiler Engineer, Tech Lead @ ByteDance
Jan 2022 – Jan 2023 | San Jose, California, United States
LLVM Compiler Engineering and Performance Engineering on mobile platforms (iOS/Android) 
- performance, code size, startup delay, power consumption, etc.
- interactions with existing mobile apps and the mobile ecosystem

### Compiler Engineer, Performance Architect @ Intel Corporation
Jan 2018 – Jan 2022 | Santa Clara, CA
•	Scaling and Parallelizing Applications across multi-core CPUs, multi-SP GPUs, and special accelerators utilizing OneAPI.
•	LLVM/ICC Compiler Analysis and Performance Optimization:
        Loop Optimizations (LoopOpt), Inter-procedural optimizations (IPO), Vectorization, etc.
•	Intel Architecture (IA) Performance Leadership
•	Parallel Programming and Application Acceleration across homogeneous and heterogeneous 
        architectures
•	Path-finding Activities

### Senior Software Engineer: Big Data/Deep Learning/Neural Network/Artifical Intelligence (AI) @ Apple
Jan 2017 – Jan 2018 | Cupertino,CA
Apple Machine Learning (ML) Software Stack Bring up:
•	Software Engineer: Apple’s Big Data/Deep Learning Neural Engine (ANE)
•	Performance Architect: Apple’s Big Data/Deep Learning Neural Engine (ANE)

### LLVM Compiler Engineer @ Intel Corporation
Jan 2016 – Jan 2017 | San Francisco Bay Area
LLVM Compiler Software Engineer
Intel Compiler Group (ICC)
Intel  Corp.
Santa Clara, CA, USA, 95054

- Program Analysis, Compiler Engineering
- Performance Analysis and Optimizations of Large-scale applications
- Compiler Efficiency and Compile-time Improvements

### Computer Security/Binary Translation Software Engineer @ Intel Corporation
Jan 2013 – Jan 2015 | Santa Clara, CA, USA
Binary Translation Software (performance) Engineer, working on Binary-translation technique for Intel Platforms on Computer Security

- Computer Security Analysis and Intrusion Detection
- Dynamic Binary Translation, Instrumentation and Optimization 
- Just-in-time (JIT) Analysis, Profiling and Optimization
- Low-Level System Software Optimizations
- Hardware-Software co-designs

### Senior Research Scientist, Senior Software Engineer @ Samsung SARC | ACL
Jan 2012 – Jan 2013 | San Jose, CA
Senior Research Scientist:
- future generation micro-kernel Operating System for multi-core/many-core architectures;
- lightweight parallel programming language and compilers tools (language design, implementation, optimization, runtime support)
- coupling with OS kernels (memory management, threading support, scheduler, etc.)

Senior Compiler Engineer:
- OpenCL program analysis and code generation for Tizen/ARM platform;
- OpenCL optimization and vectorization for big.LITTLE multi-core architecture;
- Leverage Clang/LLVM compiler infrastructure and open-source OpenCL frameworks;
- Manage, collaborate, contribute, and promote Samsung's industrial research with universities on OpenCL;

### Ph.D, Computer Science @ University of Toronto
Jan 2003 – Jan 2012
Ph.D. Thesis: Program Analysis and Optimizations for Software-only Checkpointing

Research topics:
- optimizing and parallelizing compilers
- dynamic compilation and binary translation, instrumentation and optimizations
- program understanding through static analysis and dynamic instrumentation
- thread-level parallelism, transactional memory
- architectural support for parallelism
- Multi-core architectures

### IBM CAS Ph.D. Fellow @ IBM Research
Jan 2007 – Jan 2009 | Toronto, Canada
Automatic Compiler Speculative Multi-Threading (SpMT)
  - Efficient Compiler Checkpointing (C/C++)
  - Variable Granularity Dependence Tracking
  - Potential Program Partitioning for SpMT
  - Speculative Overlap Program Execution

### Graduate Technical Intern, Programming Systems Lab (PSL), Intel Corp, Santa Clara, California, 95054 @ Intel
Jan 2007 – Jan 2007 | Santa Clara, CA
-  Dynamic Compilation/Binary Instrumentation of Intel x86/x64  binary code
-  Efficient analysis and optimization techniques for -O3 statically compiled x86/x64 binary code
-  Hardware Transactional Memory (HTM) optimizations for mission-critical x86 binary applications (patent +papers published)

### Websphere Software Engineer @ IBM Toronto Laboratory
Jan 2001 – Jan 2003
IBM WebSphere Platform Development and Performance
  -  WebSphere Commerce Server Development (Member Subsystem, Catalog Subsystem, Payment Manager, etc)
  -  Configuration Manager, Multi-Platform Installer, Admin Server
  -  Multi-Tire, Multi-Platform Configuration, Installation and Performance
  -  WebSphere Commerce Migration and Co-Existence
  -  Unix Workstation/Server/Web Server Admin, Maintenance and Web Master
  -  Acting Team Lead: Architect, Designing, Coding, Mentoring, Coaching, Major Planning and Development, etc.
  -  Product Documentation, Direct Customer Support
  - Build and Release Management: Product build and packaging, release management and fix pack management

Websphere Certificates:
 - Websphere Application Server Developer (WAS Dev)
 - Websphere Application Server Administrator (WAS Admin)
 - Websphere Commerce Server Developer (WCS Dev)

### Compiler Engineer @ IBM Toronto Laboratory
Jan 1998 – Jan 2001
IBM Compiler Development and Performance
  - Develop Platform Independent Optimizations (TPO/IPA) and Performance Enhancements
  - Develop Compiler-related Enhancements: Debugging Support, Native Packed Decimal, etc.


## Education
### Ph.D. in Computer Science -- Program Analysis and Compiler Optimizations
University of Toronto

### M.CS. in Computer Science -- Compiler and programming
University of New Brunswick


## Contact & Social
- LinkedIn: https://linkedin.com/in/chuck-zhao-4726774
- Portfolio: http://www.cs.toronto.edu

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Source: https://flows.cv/chuckzhao
JSON Resume: https://flows.cv/chuckzhao/resume.json
Last updated: 2026-04-11