# Chusong Xiao

> Wireless SoC HW design

Location: Santa Clara, California, United States
Profile: https://flows.cv/chusong

--25+ years of professional experiences in ASIC development with demonstrated achievements in areas of architecture define, including hardware accelerator microarchitecture and CPU/Vector DSP processors, front-end RTL design, integration and verification, back-end synthesis, STA, DFT, ASIC/FPGA validation and ASIC chip bring up and validation.
-- Silicon Engineering leadership in budgeting, project planning, design service,  IP and EDA tool licensing.
-- Engineering management for 5G Baseband SoC targeting small cell application
-- Engineering Lead for WiFi Baseband DSP algorithm team and digital design team crossing different geographic region to develop WiFi technology.
-- Project Lead and Engineering Management for several generations of WiFi 11a/g/n/ac/ax/be PHY baseband modem design, responsible from DSP algorithm, micro-Architecture and frontend RTL design till post silicon bring-up.
-- Experience in DSP Design and Implementation for Satellite STB, WiFi (802.11b, 802.11a, 802.11g, 802.11n, 802.11ac, 802.11ax, 802.11be),  WiMax (802.16e), 4G LTE (TD-LTE, FDD-LTE) and 5G NR Wireless Systems
-- - ASIC Design and Verification for Wireless Communication products

Specialties: 
-- DSP micro-architecture design for PHY baseband algorithms
-- Fixed point design for DSP algorithms
-- SOC Design, Integration and Verification with ARM CPU/DDR/PCIe/SerDes/Tensilica DSP IP and etc
-- RTL design in Verilog, VHDL, Systemverilog
-- Synopsys UVM/VMM, RTL and C/C++  cosimulations
-- ASIC design flow from RTL design to synthesis and Static Timing Analysis, Interface to place and route (PnR) physical design.
-- PHY baseband FPGA prototyping
-- ASIC Low Power Design
-- ASIC Post silicon validation
-- AGC for RFIC 
-- Synchronization for wireless communication system.

## Work Experience
### Chief Architect @ Spreadtrum Communications USA
Jan 2023 – Present | San Francisco Bay Area
Engineering Lead for WiFi PHY/MAC/SoC development.

### Sr. Principal/Sr. Manager @ ZEKU Technology
Jan 2022 – Jan 2023 | Palo Alto, California, United States
Connectivity SoC development including WiFi, Bluetooth and GNSS.

### VP of Modem SoC Group @ iCana
Jan 2020 – Jan 2022 | San Francisco Bay Area
-- Lead a engineering team at AchernarTek (now iCana https://www.icana-rf.com/) to develop 5G NR small cell Baseband SoC according to ORAN standard
-- Drive the technical development on Baseband SoC architecture, basestation PHY hardware micro architecture and design, silicon development and engineering budgeting and resource planning.
-- Drive business negotiation and decision on IP licensing for IP required by Baseband SoC, including standard SoC IP and customized IP; 
-- Drive business negotiation and decision on EDA tools licesning and SoC design services.

### Sr. Director and Sr. Principal Engineer @ Futurewei Technologies, Inc.
Jan 2017 – Jan 2020 | Santa Clara
R&D for Wireless Technology

### Sr. Design Manager and Principal Engineer @ Marvell Semiconductor
Jan 2016 – Jan 2017 | San Francisco Bay Area
WiFi Baseband IP development from frond-end design and verification to post-silicon validation.

### Design Manager and Principal Engineer @ Marvell Semiconductor
Jan 2014 – Jan 2016
WiFi Baseband IP development from frond-end design and verification to post-silicon validation.

### Sr. Staff Design Engineer @ Marvell Semiconductor
Jan 2001 – Jan 2014
-- ASIC Design and Verification for WiFi, WiMax and 4G LTE System, mainly focus on baseband micro architecture design and implementation for DSP algorithms. 
-- Verification of WiMax and LTE baseband design using FPGA prototype.
-- ASIC Post Silicon Debugging and Validation
-- SOC design and verification
-- Project  lead for several WiFi 11g/n/ac physical baseband design, responsible for the whole design flow from frontend to backend till postsilicon bring-ups.

### Sr. Design Engineer @ LSI Logic Corporation
Jan 1997 – Jan 2001
-- ASIC Design and Verification for Satellite STB (DVB-S, ISDB-S)  baseband modem
-- ASIC Synthesis, STA and Floorplanning and packaging for STB baseband modem
-- Post Silicon Validation for ISDB-S baseband Modem


## Education
### MSEE in VLSI, Wireless Communication  & DSP
University of Hawaii at Manoa

### BSEE in Wireless Communication
South China University of Technology


## Contact & Social
- LinkedIn: https://linkedin.com/in/cxiao

---
Source: https://flows.cv/chusong
JSON Resume: https://flows.cv/chusong/resume.json
Last updated: 2026-04-13