# Ding-Kai C.

> Principal Software Engineer at Ambarella

Location: San Jose, California, United States
Profile: https://flows.cv/dingkai

Specialties: Compiler optimizations, computer architecture, performance evaluation

## Work Experience
### Principal Software Engineer @ Ambarella
Jan 2015 – Present
Responsible for designing and creating the programming language and tools for the next generation Ambarella chip.

### Design Engineering Architect -- Compiler @ Cadence Design Systems
Jan 2013 – Jan 2015

### Principal Engineer -- Compiler @ Tensilica Inc.
Jan 1999 – Jan 2013
Compiler optimization development, enhancement, for the optimizing compiler, XCC, for Tensilica's highly configurable processor Xtensa.

### MTS @ Hewlett-Packard (HP)
Jan 1997 – Jan 1999
Investigation, design and implementation of Runtime Dynamic Optimization technology targeting IA-64 architecture.

### MTS @ Silicon Graphics Inc (SGI)
Jan 1994 – Jan 1997
Compiler optimization design and implementation with focus on high-level (loop nest) optimizations.


## Education
### Doctor of Philosophy (PhD) in Computer Science
University of Illinois Urbana-Champaign

### Bachelor of Science (BS) in Electrical Engineering
National Taiwan University


## Contact & Social
- LinkedIn: https://linkedin.com/in/ding-kai-c-940864

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Source: https://flows.cv/dingkai
JSON Resume: https://flows.cv/dingkai/resume.json
Last updated: 2026-04-12