# Druhin Sagar Goel > Software Engineer at Parafin Location: San Francisco Bay Area, United States Profile: https://flows.cv/druhin ## Work Experience ### Software Engineer @ Parafin Jan 2020 – Jan 2024 | San Francisco Bay Area ### Software Engineer @ Arrcus, Inc. Jan 2018 – Jan 2020 Our mission is to provide software-powered network transformation for the interconnected world. The Arrcus team consists of world-class technologists who have an unparalleled record in shipping industry-leading networking products, complemented by industry thought leaders, operating executives, and strategic company builders. For more information visit www.arrcus.com or follow us @arrcusinc. We are actively hiring and adding to our world class team. ### Software Engineer @ Quantifind Jan 2016 – Jan 2018 | Menlo Park ### Software Engineering Intern @ Quantifind Jan 2015 – Jan 2015 | Menlo Park, CA • Created a generalized filter used to define a specific group of a brand's consumers in order to obtain information about this group's social conversation. - Improved the flexibility of the company's product by allowing control over more filters and introducing the ability to combine these filters. • Developed a tool that is used to gain insight into social conversation of some brands' consumers, filtered on various criteria such as demographics of consumers, time period of conversation, topic of conversation, etc. by comparing two user-defined groups on the their conversation. - Improved on the previous iteration of this tool, in terms of functionality, correctness, flexibility and performance, achieving a 2-3x speedup. - Provided an API that was used by the front-end for the tool. ### Software Engineering Intern @ Vexata Jan 2014 – Jan 2014 | San Jose, CA Worked at Vexata when it was in early stages of designing a high performance enterprise class storage system. The system was a solution that used custom hardware and software. • Project was to implement a behavioral model that represented the IO path for the custom software with the goal of stimulating and verifying the custom hardware. • Verification environment used a combination of Verilog and C. C was used to implement the behavior of the software IO path and Verilog was used to implement the behavior of the hardware datapath. • The complete environment was developed to be functionally accurate representation of the end system. • Communication between the C and Verilog was done as a TCP application which was developed from scratch for this project. • The C model fully implemented IO reads / IO writes / RAID management / garbage collection functions , each of which were operating as APIs to interface to the custom hardware. • Responsible for developing the C side of the project. ### Grader, Department of Mathematics @ Carnegie Mellon University Jan 2014 – Jan 2014 | Pittsburgh, PA Responsible for grading all submissions for 80+ students enrolled in Concepts of Mathematics. • Graded assignments on topics including induction, logic, probability and combinatorial counting devoting 9-12 hours per week. • Provided a bi-weekly report to the professor on strengths and weaknesses of the class based on the performance on assignments and suggest areas that need improvement. ## Education ### Bachelor of Science (B.S.) in Computer Science Carnegie Mellon University ### International Baccalaureate Diploma Program Pathways World School, Aravali ## Contact & Social - LinkedIn: https://linkedin.com/in/druhinsgoel --- Source: https://flows.cv/druhin JSON Resume: https://flows.cv/druhin/resume.json Last updated: 2026-03-29