# Elijah Hyndman > Recent Computer Engineering Graduate // Specializing in Compositional Software Systems and Mid to Low Level Software Development Location: Fanwood, New Jersey, United States Profile: https://flows.cv/elijahhyndman I am a computer engineer with an intense love for the COE discipline. My profession is also my hobby. I am passionate and curious about theory and techniques behind our practice and I love providing mentorship for people looking to learn about it. There are particular topics which I showed strength in, piqued my interest the most, and which I shall continue studying in my own time: - Field Programmable Gate Array (FPGA) synthesizing of concurrent logic to accelerate independent processes or quickly and flexibly obtain chip-level solutions without the high upfront cost of ASIC R&D. Comfortable in DataFlow, Behavioral, Structural, and C++ Synthesized HDLs. - Signal and Frequency analysis (Convolution, Transfer Functions, Frequency Analysis and others) with the very introductions of Linear, Feedback-Control System analysis and theory. - The very introductions of VLSI design for CMOS logic, ratio'ed circuits, analysis of circuit delay, power gating techniques, and Semiconductor-level Mosfet Design - The very introductions of Information Security with methods and analysis of Confidentiality, Integrity, and Accessibility of assets on a system. Under the wide umbrella of mechanisms, I particularly enjoy asymmetric encryption, hashing, and Transport-Level security (high level of appreciation, low level ability to lecture on it) - Embedded microcontroller applications with varying levels of abstraction (from high level arduino-IDE scripting, to bare-metal C interfacing with FPGAs, to ARM assembly interfacing with GPIO.) My particular favorite area of Embedded is bit-level, interrupt-based implementation of protocols such as SPI - Prototyping, design, and fabrication of Printed Circuit Boards (particularly with SMD packages) using Component Data sheets and CAD such as Altium Designer - Creative and Aggressive application of Design Patterns and compositional-design techniques for converting system requirements into manageable, reconfigurable, and easily-understood software solutions - Acceleration of single-core applications by utilizing available hardware. Particular comfort in multiple core acceleration of applications across threads with shared memory. Now taking first steps into GPU process-acceleration I am looking for a position which will challenge and develop my skills amongst as many of these practices as possible and provide stepping-stones for leadership in software and hardware design. ## Work Experience ### Software Engineer @ Peraton Labs Jan 2022 – Present | Wharton, New Jersey, United States ### Desktop Application and Embedded Driver Developer for VR Glove @ Computer Engineering Senior design Jan 2022 – Jan 2022 | University of Pittsburgh Fulfilled developer role in three-person engineering team. VR Glove Project - Delivering a first-prototype VR Glove which introduces novel features into VR technology at a low price point using low-footprint, soft technologies. First prototype implements three soft sensors for detecting finger positions. Desktop Application - - Developed C# .DLL for automating connection to glove and processing data received through bluetooth or usb - Developed Unity blend-tree animation system for animating hand in arbitrary positions using sensor data Embedded Drivers - developed C++ scripts on ATMega328p chip for: - Configuring UART registers and writing register-level drivers on ATMega328p for transmitting information through dedicated Bluetooth Chip - Configuring ADC registers and writing register-level logic for multiplexing analog signals from sensors in preparation for transmission ### Solo VHDL Developer @ MIPS-32 Processor Jan 2022 – Jan 2022 | University of Pittsburgh Cumulate a semester's work into creating, simulating, and synthesizing a MIPS-architecture in VHDL. All VHDL is written and synthesized in Xilinx's Vivado software and Synthesized on a PYNQ-Z1 development board. Simulation and Testing is performed using TCL scripts for writing to a simulation ROM. Waveforms for internals signals are analyzed and verified to confirm correct functionality, and assertions are used to confirm general functions. The HDL is synthesized on the development board and interfaced with a ZYNQ CPU. The CPU interacts with the MIPS-CPU through a regmap and axi interconnect. The CPU executes bare-metal C to write OP codes to the regmap and polls the registers to confirm the results. ### AGILE Team Lead @ ECE 1140 Mock Engineering Solution Jan 2021 – Jan 2021 | University of Pittsburgh Semester-Long project simulating real-world development process for an Engineering Solution. Fulfilled Leadership duties in Development Team. Responsibilities Include: - Working with multiple stakeholders to develop requirements for a simulation software. Interacting with stakeholders through email and virtual zoom meetings. - converting requirements list into an overall software-system design which our 6-person engineering team would implement and deliver. - Responsible for partitioning overall system design into modules and communicating roles, tasks, and information to team members. - following-up with team members, checking quality assurance and testing, and performing integration of the modules. - Designing overall multithreading for handling multiple application processes, implementing the physics and world-time for the simulation, and implementing the host environment and UI launching tools. Also responsible for delivering hardware-implementation of Wayside Control System (WCS) module within the railroad simulation. - Writing a compiler for interpreting pseudo-PLC commands for controlling the Railway - Writing User Interface for WCS - Implementing control between WCS PLC Scripts and their controlled hardware Implemented on raspberry pi with internet connection to host computer. Written in Java with remote interfacing performed through RMI stubs over the network. - Writing JUnit tests for regression testing ## Education ### Bachelor's of Science in Engineering in Computer Engineering University of Pittsburgh ### High School Diploma in Physical Medium and Visual Design Capital Area School for the Arts Charter School ## Contact & Social - LinkedIn: https://linkedin.com/in/elijahhyndman --- Source: https://flows.cv/elijahhyndman JSON Resume: https://flows.cv/elijahhyndman/resume.json Last updated: 2026-04-13