# Fu-Tai (Richard) A.

> Product Development/Engineering Executive, Analog / Mixed Signal at Infinera

Location: San Jose, California, United States
Profile: https://flows.cv/futairicharda

1. Seasoned in technical leadership and project management to help the organization win the market. 
2. Apply agile project (program) management skills and strategies to ensure the schedule and quality of products.
3. Inspire and encourage the team to think outside the box; provide practical and effective solutions to boost the company's top line and bottom line.
4. Hands-on Mixed-signal circuit design skills: Continuous-Time Linear Equalizer (CTLE), Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), Deserializer, Serializer, ultra-low jitter Phase-locked Loops (PLLs)Transmitter Driver, etc.
5. Hands-on Analog circuit design skills: including but not limited to high speed ADC, high resolution ADC, current mode high speed DAC, filters, VGA/PGAs.
6. Optical networking: the future optical access networks presenting a smooth migration path for the telecommunication providers to upgrade their networks to provide customers with fast and reliable services.
7. Optical communications: optical modulation formats that enables high spectral efficiency of long-haul communications.

Specialties:
 * Project management, people management, and technical leadership;
 * Analog / Mixed-Signal Circuit Design.

## Work Experience
### Product Development/Engineering Executive (VP of Engineering) @ Infinera
Jan 2024 – Present | San Jose, California, United States

### Senior Director, Analog / Mixed Signal @ Infinera
Jan 2015 – Jan 2024 | San Jose, California, United States
* In charge of the company's development of high-speed, high-performance CMOS analog / mixed signal IP design for the cutting edge optical transmission systems, including but not limited to ADC, DAC, low-jitter PLL, etc. in TSMC 5 nm and 3 nm technology nodes.
* In charge of the company's development of the low-power, low-noise, high-resolution photonic IC (PIC) controller.
* Have built the team from ground up; Currently managing and supervising ~30 people at multiple sites accross the globe.
* Guide the team to valuate CAD tools and constructe the efficient design environment.
* Establish the design methodology and layout guidelines to help the team to be more efficient and effective. Direct the team to apply the right process to minimize the overhead.
* Provide technical guidance to the team; groom and equip the team with the latest design knowledge.
* Help the company define the business strategy in terms of IP development priorities.

### Senior Design Manager @ Atmel Corporation
Jan 2014 – Jan 2015 | San Jose
> Leading the development of low-power high resolution analog IPs, including but not limited to ADC, DAC, regulators, oscillators, touch controllers.
> In charge of the analog IP development of the flagship MCU flagship products, including but not limited to C21, aiming for industrial and automotive applicators, and L21, aiming for low-power IoT applications.

### Senior Design Manager @ Xilinx
Jan 2012 – Jan 2014 | San Jose
Currently I have 10+ direct reports local and remote under my supervision. Also, there are 10+ engineers technically supervised by me. I am leading a mixed signal design / layout team engaging in the implementation of the PMA layer of ultra-high-speed (10 Gb/s+) multi-standard serial links with TSMC's advance processes.

### Senior Manager @ GUC
Jan 2009 – Jan 2011 | San Jose, CA
In charge of:
* Low-Power UniPHY (multi-standard, multi-rate) for rates from 1 Gb/s to 12.5 Gb/s;
* Burst-Mode Transceiver.
Technical capabilities:
* CMOS Transmitters, PLL/DLL, Receiver Front-End, Clock and Data Recovery.

### Staff Engineer @ Marvell Semiconductor
Jan 2004 – Jan 2008
Analog and mixed-signal circuit design.

Specialties: high-speed ADC, DAC, VGA, Attenuators, and filters.

### Research Assistant @ Stanford University
Jan 2000 – Jan 2004
Ph.D. Thesis: Novel Modulation Formats and Next Generation Optical Access Networks.

Project involved:
* High speed serial link (DARPA)
* Optical Modulation & Amplifiers (Sprint)
* Next Generation Access Networks (SNRC)
* Optical Burst-Mode Transceivers (ITRI)


## Education
### Ph.D. in Electrical Engineering
Stanford University

### Bachelor of Science (BS) in Electrical Engineering
National Taiwan University


## Contact & Social
- LinkedIn: https://linkedin.com/in/futaian

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Source: https://flows.cv/futairicharda
JSON Resume: https://flows.cv/futairicharda/resume.json
Last updated: 2026-04-13