# Greg Schnorr

> Principal Software Engineer at Palo Alto Networks

Location: Morgan Hill, California, United States
Profile: https://flows.cv/gregschnorr

Senior Embedded Firmware Engineer with broad datacom and telecom industry experience. Proven performance as a key contributor to several successful product families.

Specialities: System architecture, platform software, digital signal processing

## Work Experience
### Principal Software Engineer @ Palo Alto Networks
Jan 2021 – Present | Santa Clara County, California, United States
Responsible for platform software on the company's next generation firewall product.

### Senior Tech Lead @ Cisco Systems
Jan 2004 – Jan 2021 | Milpitas, CA
- Platform Software Tech lead on Cisco's $4.5B/yr Catalyst switching product line; fastest Cisco program to ramp to $1B
- Startup member of a new product team which designed, developed and delivered the ASR1000 family of 5-200Gbps edge routers. ASR1k represents over $1B/yr revenue.
- SW Technical lead for several custom datapath bridge ASICs. Developed Linux device driver firmware, configuration and exception handlers for these devices, running on Freescale MPC85xx and Intel x86 processors 
- Developed boot firmware for several generations of Intel x86 processors (Wolfdale, Jasper Forest, Ivy/Sandy Bridge, Broadwell-DE) running Insyde SW’s uEFI BIOS as well as on Freescale PowerPC MPC85xx processors.
- Individual contributor on many chassis management and infrastructure enhancements (including SPI4, PCIe, commodity device drivers such as SPI, I2C, USB...) as well as customer escalation teams
- Platform Software Team lead for the Catalyst 9300-Gen2 refresh effort
- Technical lead for Cisco’s first deployed “Secure boot” trusted platform ecosystem
- Technical lead for environmental monitoring (temp, voltage, fans) for a metro Ethernet switch

### Engineer @ Cloudshield Technologies (purchased by SAIC)
Jan 2002 – Jan 2004 | Sunnyvale, CA
- Developed firmware for the Intel IXP1200 and IXP2800 network processors running in an internet security appliance.  This included both NPU microcode as well as Linux device driver and board initialization, boot firmware, upgrade utilities and diagnostics.
- Developed micro controller software, Linux device drivers and an FPGA for a environmental monitoring blade

### Engineering Manager @ Tollbridge Technologies
Jan 1998 – Jan 2002 | Santa Clara, CA
- Member of initial startup team
- Voicepath architect and lead DSP firmware engineer responsible for developing a packetized voice media gateway.  Developed/integrated audio codecs, echo cancellation, jitter buffer firmware. Oversaw telephony conformance test efforts.
- As the platform software group manager, led a team of 6 engineers responsible for OS, board support packages, network device drivers and DSP firmware

### Engineer @ interWave Communications (purchased by LG Wireless, Altobridge)
Jan 1995 – Jan 1998 | Redwood City, CA
- Member of initial startup team
- Lead DSP firmware engineer responsible for the development of a GSM (Global System for Mobile Telecommunications) digital microcellular basestation/switch product line in a demanding startup atmosphere.  
- DSP firmware design and development of the transcoder and rate adapter functions, the GSM Enhanced Full Rate (EFR) vocoder, data and fax rate adaptation and frame processing. Also responsible for implementation of DSP DTMF/Cadence generation and R2 Signalling MF tone generation and detection modules, radio subsystem support and RF interface drivers.
- Lead engineer responsible for developing firmware based calibration methods to allow compliance to very stringent radio interface standards.
- Engineering liaison to manufacturing for issues related to the TRX radio subsystem, voice path problems and unexplained phenomena

### Engineer @ Applied Signal Technology (purchased by Raytheon)
Jan 1990 – Jan 1995 | Sunnyvale, CA
- Project manager and lead designer of an adaptive digital modem processor card including system engineering, design, supervision of layout and fabrication, and board level debug. DSP assembly and C language control and adaptive processing firmware code to run on above board. 
- Lead engineer on a frequency domain adaptive equalizer card, including HW design, supervision of layout and fab as well as board level debug 
- Co-developer of a suite of adaptive digital signal processing algorithms


## Education
### MS in Electrical Engineering
University of California, Davis

### BS in Electrical Engineering
California Polytechnic State University-San Luis Obispo

### Ocean View High School


## Contact & Social
- LinkedIn: https://linkedin.com/in/greg-schnorr-3a45961

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Source: https://flows.cv/gregschnorr
JSON Resume: https://flows.cv/gregschnorr/resume.json
Last updated: 2026-04-12