# Haiguang Liao

> AI & Chip Design

Location: San Francisco Bay Area, United States
Profile: https://flows.cv/haiguang

Engineer & Researcher making positive real world impact with AI
Interest Areas: 
- DL/RL/Optimization/LLM/AgenticAI
- Applied AI (ChipDesign, Vision, Physical AI, Manufacture)
- Efficient AI, AI Chip
- Tech VC, Tech Startups
Ex-CMU/NVIDIA/Amazon

## Work Experience
### Founding Engineer @ Generation Alpha Transistor
Jan 2025 – Present | San Francisco Bay Area
Build Agentic AI system for analog chip design 
- Top VC backed | DoD contractor (Defense Innovation Unit)
- We're hiring! Drop me a message for more info
Key words: Agentic AI (Knowledge, Context, Memory, Infra, Eval), Silicon EDA (Analog, P&R, PDK, Rust), GUI (WebGL, React), Distributed System

### Lead Software Engineer, Machine Learning @ Cadence Design Systems
Jan 2023 – Jan 2025 | San Francisco Bay Area
Push EDA tool PPA frontiers with AI
- Building deep learning opt. engine in Innovus (data pipeline, deploy, debug/eval infra) 
- Core power opt. engine dev
- Customer engagement (e.g. Nvidia, Apple, etc.; ~ 3% power gains in 2nm blocks)
- LLM digital EDA backend (debug tools, codegen, copilot)
Key words: GNN, RL, LLM, RAG, Digital Design; PyTorch, PyGeometric, Python, C++

### Research Associate @ Carnegie Mellon University
Jan 2018 – Jan 2022 | Greater Pittsburgh Area
Research Thesis: DL, RL, Optimization, GNN, Applied ML (Chip Design, combinatorial problems, time series model, etc.); Lab: Graphics Group
Research Project: DARPA IDEA, in collaboration with Cadence & Nvidia
Advisor: Levent Burak Kara, Barnabas Poczos

### Applied Scientist @ Amazon Lab126
Jan 2022 – Jan 2022 | Sunnyvale, California, United States
Audio ML team (got full-time AS II offer) 
Project: RL Neural Architecture Search (NAS) for Speech Enhancement model on Neural Network Accelerator (NNA)
Key Words: NAS, model compression/quantization, ML accelerator, model-platform co-design, Audio ML, RL

### Research Intern @ NVIDIA
Jan 2021 – Jan 2021 | Austin, Texas Metropolitan Area
NVIDIA Research (ASIC's team)
Project: RL, GNN, Transformer for Placement and Route of Advanced Node Standard Cell
Key Words: RL, chip design, GNN, Transformer, combinatorial optimization, imitation learning

### Machine Learning Software @ Cadence Design Systems
Jan 2020 – Jan 2020 | San Jose, California
Develop RL-based physical design models (analog placement) prototyped at CMU (under DARPA project) into Cadence Custom IC flow (Virtuoso)

### Research Assistant @ Northwestern University
Jan 2017 – Jan 2018 | Evanston, IL
Machine learning/deep learning application to engineering problems (additive manufacturing, cyber physical system)
Advisor: Prof. Jian Cao, Prof. Kornel Ehmann

### Research Assistant @ Shanghai Jiao Tong University
Jan 2013 – Jan 2017 | Shanghai City, China
Process optimization, data-driven modeling and advanced materials development of emerging manufacturing techniques (additive manufacturing, FSP)
Advisor: Prof. Liming Peng, Prof. Penghuai Fu


## Education
### Doctor of Philosophy - PhD in Machine Learning
Carnegie Mellon University

### Master of Science - MS in Machine Learning
Carnegie Mellon University

### Master of Science - MS
Northwestern University

### Master of Science - MS
Shanghai Jiao Tong University

### Bachelor of Science - BS
Shanghai Jiao Tong University


## Contact & Social
- LinkedIn: https://linkedin.com/in/haiguang-liao-4747bbb0

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Source: https://flows.cv/haiguang
JSON Resume: https://flows.cv/haiguang/resume.json
Last updated: 2026-04-05