Innovation in Security and Anti-tamper technology.

o SoC Embedded Software – Design and implement: Bare-metal RTOS for security processors with accelerated hardware cryptography engines and peripherals; API firmware as services on the attached buses (AXI, APB, etc.) to provide hardware security functions such as AES, SHA-3 (Keccak), Elliptic-curve cryptography (ECC), ECDH, TRNG, keyring-based encryption, anti-tamper, and other long-math and security functions; PCIe endpoint internal firmware for MSI/MSI-X from or to host systems over PCIe; FPGA blocks using Xilinx Vivado design suite; Software to secure boot external firmware, BIOS and OS; Software model to emulate hardware for simulation model testing.

o Design verification lead – Implement software to test and debug the SoC with issues such as faulty CPU instruction set, cache coherence, DMA, ECC, AES, SHAs, etc.. Write microcode to fix hardware bugs.

o Intel x86-64 – Lead the software team to architect, design, implement, test, and debug secured boot of UEFI/BIOS, Coreboot, and other firmware. BIOS implementation: initialize RAM, perform BIST, prevent tamper, enumerate PCIe, establish a secure channel with the SoC API utilizing ECDH, secure boot an encrypted OS via PXE or from disks, and provide UEFI runtime services.

o Linux Kernel – Implement kernel internal code for booting an encrypted kernel. Design and implement Linux driver for the SoC to utilize the UEFI runtime to establish a secure communication channel with the SoC, with functions such as multipoint authentications and sophisticated keyroll algorithms, to guard against man in the middle attack (MITM). Implement Linux board support package (BSP) and user applications for testing, performance measure, and security feature demonstration.

o Provide training for customers’ engineers on the BSP and to develop software for the security processor. Lead final secure integration with customers’ hardware and their engineers.

DDRx, Memory Technology, Windows, Linux. Intel Processor Technology Internal, DisplayPort performance tracing.

Develop platform software for NetApp's storage controllers;

o Fault tolerance – Designed implemented software for NVRAM/NVMe to protect the system from crashes due to faulty hardware, software, or sudden power loss. Preempted implementation and saved the company’s flagship storage controller line from silence data loss disasters.

o ARM: Embedded Linux, FPGA driver, Apache Thrift server, IPMI interface.

o Intel x86: Storage software, FreeBSD, drivers, Apache Thrift client, FPGA driver, SMF UI; Lead BIOS, Firmware and Expander teams for their implementation, integration, and testing.

o PCI-Express: PLX bridge/device, probe, driver, interface; PCIe capabilities, Hot-Plug state machine, event notification, error detection, error injection.

o Resolved UART kernel/user spaces IO contention, IO interleave mechanisms.

SoC software/firmware/hardware development. Member of the Security Processor Compartment.

Multitasks on fast pace multiple engineering roles:

Electronic Model Engineer – Reported directly to the CTO

o Developed software and microcode to model electronic and mechanical subsystems of the DoD’s

aircrafts (F-16, Apache), vehicles (Bradley), and standard missile guidance systems.

o Integrated software models, hardware models, production hardware and system software.

o Implemented software to emulate floating-point instructions on PowerPC’s non-floating-point CPU.

Embedded Software Engineer – Reported to the VP of Engineering. Developed software, firmware, and

drivers for all of company’s boards and systems with mix-types of CPU’s.

o Lead system software and firmware development on an HPC with 256 PowerPCs, NUMA, and PCIe

switches. The HPCs are stackable via PCIe fabrics to provide unlimited PowerPCs computing. Brought

up the hardware, booted and initialized all 256 PowerPCs to provide I/O, two dimensional PCIe routing,

and internal processors’ communications.

o Developed Device Drivers for Linux, INTEGRITY, EPOS, u-boot, and CPU Tech’s RTOS to handle Ethernet, PCIe, AES, TRNG, SPI, I2C and other IO devices.

Design Verification Engineer – Reported to the Director of Engineering.

o Designed and Implemented verification software suites for: CPU (PowerPC, 56000, 680XX, 1750FX, x86, Security Processor), Buses, Ethernet, video, radar, memories, MUX-bus, Serial Bus, other IO/interface devices, and MIL-STD-1553 verification suite for mission critical flight-computer.

o Analyzed signals, logics, timings and state-machines in simulation, chipscope and logic-analyzer to find bugs and bring-up hardware. Implement hardware fixes using CDL (VHDL equivalent). Debugged and resolved interface issues: big to/from little endian, 16-bit to/from 8-bit data-bus, 64-bit to 32-bit processors, IP buses access/x-access.

o Develop LabWindows CVI GUI control application for production.

Known as a go to engineer for difficult bugs – resolved 2+ years of outstanding issues allowing payments

from customers and preventing cease in operation of the company’s major wafer inspection station product line.

Embedded Software Engineer: Dark-field inspection. Designed and implemented first ever Embedded

Linux Software/Firmware at KT. Mentored other software groups migrating from VxWork to Linux.

o Firmware - Implemented 405gp BIOS in assembly and C to initialize CPU, SDRAM, I2C, PCI, Ethernet

TX/RX, TFTP Client. Implemented software to remote boot/upgrade kernel, BIOS and FPGA over LAN.

o Linux Kernel – Configured/built/debugged PowerPC target with ram-disk boot image. Develop Ethernet

driver, PCI drivers for onboard Xilinx FPGA.

o Embedded Software – Real-time programming, OOD; Developed Linux API and system calls;

Developed Windows/Linux communication protocol using RPC.

Software Engineer: Bright-field inspection. Designed and implemented large-scale Windows NT/2000

Server software to control the entire wafer inspection. Traveled worldwide to resolve customer’s issues.

o Implemented software and algorithms: Windows GUI, applications and drivers; Images: optics, light

source control, 4K line-scan camera, DFFT, image processing, filtering, frame/defect grabber, reviewing

station; robotic control and safety: robotic arm, wafer stage and alignment, auto-feed holder, vacuum.