- Extensive work on improving core technology for FPGA and ASIC design tools. - Design and implementation of a formal verification tool for FPGA and ASIC technology designs. - Participated in the successful creation of a new start-up company.
Experience
2026 — Now
2012 — 2022
2008 — 2012
2007 — 2008
Education
Télécom Paris
Ph.D
CentraleSupélec