• Efficiency Improvement in Spark Shuffle Service

Improved the efficiency of the Spark shuffle service that powers hundreds of terabytes per day for the company’s data infra. Designed and implemented buffering logic to leverage both memory and flash storage, landed the optimization in production, and delivered 57% savings in capacity.

• Public Cloud Demand Management and Efficiency

Led a cross-functional team that managed the company’s spending and budget for the public cloud. Established the team’s vision and roadmaps and built a cross-organizational demand management process. Drove efficiency initiatives, designed and executed budget enforcement processes, and saved the company 5% in its total annual budget for the public cloud.

• Meta Product Infra Re-architecture, Efficiency, and Capacity

Initiated and drove backend infrastructure re-architecture to easily adapt traffic shifts across the data centers, collaborating with WhatsApp messaging and Marketplace ranking teams. Oversaw that the allocated capacity was sufficient and used efficiently. Capacity planned to support product launches and special events during traffic surge of up to 2.5x (e.g., holiday shopping, New Year’s Eve, and Covid spikes).

• Power Tool Enabling on Intel “Next Generation” Architectures

Enabled power metrics to identify the blockers that prevent the System-on-Chip (SoC) from entering low-power states, while minimizing perturbations to the system. Cooperated with architects and completed the features beforehand for the “Next Generation” architectures, using C/C++ on Windows/Linux platforms.

Identified a priority invention problem that occasionally caused deadlocks in the collector’s operating system (OS) context-switch sampling mechanism. Provided a fix, which was validated to achieve 100% reliability (10% deadlocks before fix), using C on Windows platforms.

Conducted object-oriented analysis and redesign based on commonalities and variations in collection mechanisms, metrics types, and output formats. The refactored code base improved the efficiency to fulfill customer requests from days to as short as hours, using C++ on Windows/Linux platforms.

• Performance Tool Enabling on Intel Many Integrated Core (MIC) Architecture

Enabled the thermal, power, and voltage metrics in support of performance and energy efficiency analysis in data centers. Designed and implemented a readers-writer mechanism and reduced the querying traffic by ~10X on active workloads, using C on Linux platforms.

• Microsoft H.264 Video Encoder Enabling on Intel Haswell Architecture

Identified the computation hot spots, vectorized the motion estimation kernels in the Microsoft H.264 video encoder, and delivered ~2X speedup, using C and SIMD assembly (e.g., AVX2 and SSE) on Windows platforms.