● Designed and implemented dockerized infra to test different api variants (Ros/Ros2/Cuda)- Automated build/run/test of different api variants across different platforms (x86/aarch64)

● Lead developer of test libraries/infrastructure for the new ASIC platform

● Major contributor to build and release scripts/workflows for software releases

● Owner/Maintainer of python api wrapped around compiled c++ api used to interface with the sensor

● Led camera test automation

• Built up hw/sw for an automated camera test setup from scratch (Used microcontrollers to spoof vehicle can

modules and control ball screw motor to move cameras to different test positions, setup tcp server/client to

control windows only test equipment for seamless tests, etc)

• Wrote plugs/phases/suites used in aihtf framework for automated camera tests (Automated exposure,

injection, metadata tests, etc)

● Contributed to embedded c++ development on camera ps side

• Reporting SoC temps/voltages over metadata/someip udp packets, PoC for autosar like communication on

linux, etc.

● Worked on system level integration using the Yocto open-source project, providing distro support for various Xilinx FPGA devices

• Wired in support to build for various different eval boards with different SoC’s (including Qemu support)

• Leading implementation of fpga-manager, dynamic reconfiguration of PL on buildsystem side

● Implemented containerized build system using Docker for daily eSDK builds

• Developed custom SD boot flow using xilinx boardfarm infrastructure to run daily sanity check

• Original contributor of build scripts in use across build infrastructure today

● Co-maintainer of Xilinx meta layers, meta-xilinx, meta-xilinx-tools, meta-petalinux

• Led/involved with all aspects of 8+ successful releases (publishing of meta-layers to github, deploying rpms on public server for customer ease of use, legal code sweep for all components, handing off eSDK’s, rpm generation, etc)

• Involved with 3+ yocto release upgrades

● Contributed multiple enhancements/fixes to upstream Open-Embedded core (devtool, devicetree, etc)

● Various integration projects:

• Developed utility to read eeprom fru data and dynamically configure configs to use a superset feed, implemented infrastructure to upgrade individual components in packaged bootloader, etc

• Worked with design software Cadence Allegro to review board revisions and update changes and justifications in timely fashion

• Utilized Valor software for DFM validation on multiple boards