[2020-April 2025] Infra for large-scale revenue-critical recommendation systems

[April 2025-Present] Tech lead on Messaging AI/ML Infra team

Work on news feed integrity modeling team.

Main project consists of improving labeling quality by creating new labeling queues. This includes creating new labeling screens that both showed content of sample and decision widget. Further, project involves designing data pipeline to aggregate results in the backend so that these could be incorporated into training dataset.

Side projects include experimenting with in-house APIs to incorporate new signals into our models and analyzing impact of these on model's precision and recall statistics, and enabling rendering of new video features on labeling screens.

Front-end design work on a part of an upcoming client SoC for Intel's Devices Development Group. Collaboratively defined and implemented the microarchitecture of the part of our chip in SystemVerilog and tested this microarchitecture using OVM. Optimized for power using internal RTL-level power tools.

Back-end digital design work on upcoming client SoC. Pushed for timing convergence of critical paths in our subsystem and designed a timing script to help identify timing convergence problems faster. Helped define and identify design priorities in early stages of design process for another client SoC.