# Javier Raygada > ML Infra Engineer at Meta Location: San Francisco, California, United States Profile: https://flows.cv/javierraygada I solve problems at the intersection of AI/ML and large-scale infrastructure. ## Work Experience ### Staff Software Engineer @ Meta Jan 2019 – Present | San Francisco, California, United States [2020-April 2025] Infra for large-scale revenue-critical recommendation systems [April 2025-Present] Tech lead on Messaging AI/ML Infra team ### Video Analytics Software Intern @ NVIDIA Jan 2018 – Jan 2018 | Santa Clara, California ### Software Engineering Intern @ Facebook Jan 2018 – Jan 2018 | Menlo Park, California Work on news feed integrity modeling team. Main project consists of improving labeling quality by creating new labeling queues. This includes creating new labeling screens that both showed content of sample and decision widget. Further, project involves designing data pipeline to aggregate results in the backend so that these could be incorporated into training dataset. Side projects include experimenting with in-house APIs to incorporate new signals into our models and analyzing impact of these on model's precision and recall statistics, and enabling rendering of new video features on labeling screens. ### Graduate Design Intern @ Intel Corporation Jan 2017 – Jan 2017 | Hillsboro, Oregon Front-end design work on a part of an upcoming client SoC for Intel's Devices Development Group. Collaboratively defined and implemented the microarchitecture of the part of our chip in SystemVerilog and tested this microarchitecture using OVM. Optimized for power using internal RTL-level power tools. ### Platform Engineering Intern @ Intel Corporation Jan 2016 – Jan 2016 | Hillsboro, Oregon Back-end digital design work on upcoming client SoC. Pushed for timing convergence of critical paths in our subsystem and designed a timing script to help identify timing convergence problems faster. Helped define and identify design priorities in early stages of design process for another client SoC. ### Electrical Engineering Intern @ Hewlett Packard Enterprise Jan 2015 – Jan 2015 | San Diego, California Accepted an internship opportunity from June 2015 through September 2015. Going to be working in the R&D Inkjet Hardware Design Lab. Internship primarily consists of analysis, designing and testing of inkjet printers. Worked on the design, testing and characterization of an optical sensor board for a handheld printer concept R&D project. ### Coordinator Assistant @ Stanford University Jan 2014 – Jan 2014 ### Mathematics Instructor @ Mathnasium - The Math Learning Center Jan 2012 – Jan 2013 ## Education ### Master of Science (M.S.) in Electrical Engineering- Software and Hardware Systems Stanford University ### Bachelor's Degree in Electrical Engineering - Circuits and Devices Stanford University ### High School Diploma Eastlake High School ## Contact & Social - LinkedIn: https://linkedin.com/in/javier-raygada-360932b1 --- Source: https://flows.cv/javierraygada JSON Resume: https://flows.cv/javierraygada/resume.json Last updated: 2026-04-12