# Jia Feng

> Self-driving

Location: Mountain View, California, United States
Profile: https://flows.cv/jiafeng1

## Work Experience
### Staff Software Engineer, TLM @ Waymo
Jan 2017 – Present | San Francisco Bay Area
Accelerator design, sensor signal processing, and system integration.

### Sr. Hardware Engineer @ Google
Jan 2016 – Jan 2017 | Mountain View
Design of ASIC and FPGA accelerators for video codec, image processing, and security.
High-level synthesis.

### Sr. Software Engineer @ Baidu USA
Jan 2015 – Jan 2016
FPGA-based accelerators for data-center and self-driving applications using Xilinx SDAccel and High-Level Synthesis.

### Principal Hardware Engineer @ Oracle
Jan 2012 – Jan 2015
Server processor core memory design.
Micro-architecture/circuit co-optimization for performance and power.
Design analysis and automation Tools.

### Member of Technical Staff @ GLOBALFOUNDRIES
Jan 2009 – Jan 2012
Design-Technology Co-optimization in 32-, 28-, and 20-nm technology nodes.

### Summer Intern @ IBM
Jan 2008 – Jan 2008
Statistical analysis of MOSFET characteristics in 45-nm bulk technology.


## Education
### PhD in Electrical Engineering
Stanford University

### M. Eng./B. Eng. in Electronic Engineering
Tsinghua University


## Contact & Social
- LinkedIn: https://linkedin.com/in/jia-feng-02b5911b

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Source: https://flows.cv/jiafeng1
JSON Resume: https://flows.cv/jiafeng1/resume.json
Last updated: 2026-04-12