# Jim Chiappe

> EMC Design Engineer at Apple

Location: Walnut Creek, California, United States
Profile: https://flows.cv/jimchiappe

## Work Experience
### EMC Design Engineer @ Apple
Jan 2024 – Present

### EMC Team Lead, Special Projects Group @ Apple
Jan 2021 – Jan 2024

### EMC Design Engineer, Special Projects Group @ Apple
Jan 2015 – Jan 2021

### EMC Design Engineer @ Juniper Networks
Jan 2006 – Jan 2015 | Sunnyvale, CA
Responsible for providing EMC Design and Testing support on Juniper Networks’ products.

Work with Electrical Mechanical, Power, Thermal and Manufacturing Engineers on providing simple, effective, cost-sensitive EMC measures in product design.

Work on high port density fixed configuration and chassis based systems covering EMC effects from DC to 40 GHz.

Coordinate required performance levels with vendors for transceivers, integrated magnetic RJ45 connectors, integrated magnetic connectors, power supplies, EMI shielding, and ASIC components.

Support ODM, JDM, and OEM development with vendors and coworkers in Taiwan, China, India, and Massachusetts.

Coordinate EMC testing with EMC labs for FCC, EN55022, EN55024, EN300386, GR1089 EMC/Safety, DT 1TR9, VCCI, KN22, KN24, and AS/NZS compliance.

Work with internal teams on project scoping and planning.

Use Microsoft Office, Allegro, Concept, PSpice, and CST Microwave Studio software packages to review and analyze EMC performance.  Use spectrum analyzers, network analyzers, oscilloscopes, current probes, near-field probes, ESD guns, surge/EFTB generators, and various antennas to mitigate EMC issues.

### Manager, EMC Design @ Cisco Systems
Jan 2000 – Jan 2006 | San Jose, CA
Supervised group of 5 – 9 EMC Design Engineers with experience ranging from intern to technical leader level in a business unit at Cisco that accounted for over $6 billion in annual revenue.

Provided status updates at weekly compliance meetings.

Conducted weekly one-on-one meetings with direct reports.  Assessed performance at mid-year and year-end reviews.

Provided EMC Design support coverage on projects as needed.

Visited customer locations in various states to assess grounding schemes, acoustic noise, and surge effects.

Assisted with multiple debug issues on IP phones including ESD immunity, Class D amplifier emissions, radiated noise immunity, surge, and mobile phone radiated immunity.

### EMC Engineer @ Cisco Systems
Jan 1998 – Jan 2000 | San Jose, CA
Provided EMC design support on IP Phones and Catalyst 6000, 5000, and 4000 Ethernet switching platforms.

Supported EMC debug and final testing.

Supported concept development on Cisco’s pre-standard PoE interface.

### EMC Engineer @ CKC Laboratories
Jan 1994 – Jan 1998


## Education
### BSEE in Electrical Engineering
University of California, Davis


## Contact & Social
- LinkedIn: https://linkedin.com/in/jimchiappe
- Portfolio: http://www.juniper.net

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Source: https://flows.cv/jimchiappe
JSON Resume: https://flows.cv/jimchiappe/resume.json
Last updated: 2026-04-13