Manage a design, driving weekly customer updates and internal cross functional meetings. Schedule planning from synthesis to tapeout including the best possible package selection within given budget meeting deaign requirements.
Lead the 1st Flip Chip Hierarchical Design at Open Silicon : Driven various decisions for flow/package/Blockfloorplanning/IOplacement at various stage of project milestone.
Drive customer meetings at various stages of project.
Got coached for design management position for future projects.
Work closely with block owners and own top level floor planning and implementation.
Work on feedthrough planning and insertion with Front End Team forming closure of critical DDR interface to various clients accessing memory through DDR controller
Bump planning and RDL routing planning
Lead Automation tasks that were used across board for multiple designs from adoring automation to power grid to IP integration.
Spice SSO Analysis for different packages from Wirebond/CSP/FlipChip/WirebondLead/WirebondPin packages.
IR/EM closure for various chip through efficient power planning for wire bond chips. Develop IR and EM flows and methodology.
Presented Papers at Magma Tool Forum and won 2nd prize.