# Kathy Tan > System Architect Location: Santa Clara, California, United States Profile: https://flows.cv/kathytan system architect with extensive SoC background and industry experience, taped out 18 chips - System architect- product definition and development, focusing on use cases, requirements and system optimization; bridging silicon, board, validation and SW teams; drive technical evaluation, solve cross-functional technical problems - SoC architect with extensive ASIC design experience previously, good knowledge of SoC, ASIC/COT flow, and direct hands-on experience previously in all stages of front end silicon design - Coordinating cross functional and cross organizational teams in domestic and global sites - Mentoring engineers in technical pipeline - Result driven, accountable, approachable, motivated self-starter and fast learner, proven track of working from product planning, specification and execution to completion. Specialties: - product definition, use case decomposition and analysis, SoC/ASIC requirements, product development. Identify system optimization opportunities in SoC and system - communication and collaboration with cross-functional teams and cross-geo teams. - SoC chip architecture, micro-architecture - ASIC/SoC design, Ethernet, synthesis, STA, developing test plans, verification, strong debugging skill - Design/Verification/Synth Tools Used: Verilog, VCS, Questa, Synopsys Design Compiler, Prime Time, Blueprint, Spyglass, Conformal Lec, 0-in, Vera, Perl, Test Compiler, Tetramax. #Automotive #AI inference accelerator ## Work Experience ### Sr Principal Engineer @ Mips Technologies (acquired by Global Foundry) Jan 2024 – Present | San Francisco Bay Area automotive system architect and SoC architect ### Senior Principal Engineer, System/Product Architect for Intel automotive @ Intel Corporation Jan 2023 – Jan 2024 | United States Product definition for in-cabin and ADAS automotive products; use case decomposition, workload analysis to define features and performance target; collaborate with business teams for design wins. ### Sr Principal Engineer, Systerm Architect, Client Compute Group @ Intel Corporation Jan 2022 – Jan 2024 | Santa Clara County, California, United States User Experience (UX) System Architect for client products (laptop, desktop, workstation): Work with user experience research to define use cases that are future trends or solve customer pain points, perform use case decomposition, generate requirements for IPs, SoC, platform (HW/SW) across desktop, mobile (laptop) and Workstation (Xeon) products, deliver requirements spec into product requirements, collaborate with business and account teams for ISV engagement, co-definition or co-development. ### Sr Principal Engineer, Product Architect for IOT @ Intel Corporation Jan 2020 – Jan 2021 | Santa Clara, California, United States Collaborate with business and planning teams on IOTG x86 products (client & server); lead a virtual team for use case definition, decomposition and workload development for product requirements and architecture model accuracy. ### Principal Engineer, Product and System Architect for Embedded and IOT @ Intel Corporation Jan 2012 – Jan 2020  Product and system architect for edge inference vision products with ARM processor, main applications as NVR, AI box, smart IP camera, edge cloud and data center inference accelerator. Delivered product requirement spec. - Collaborate with marketing and product teams, visit customers, translate use cases to product requirements. - Delivered platform architecture spec, define workloads and data flows, - Overseeing the system/platforms, make sure product and SoC requirements, package, board, SW, customer enabling, etc. all align and come together as a whole, keep consistency and reuse capability across products. - Work closely with multi-functional teams and identify opportunities to optimize the system (SoC, board, thermal, SW, etc), in terms of cost, capability and time to market. System architect for Enterprise IoT (embedded) products, such as automobile, industrial control, retail (banking, digital signage, education, etc.) - Collaborate with strategic planning and marketing, influence product road map with IOT product features - Spear headed on getting IoT features into SoC, work with design team on implementation - Work with multi-functional teams on feature, power, ### SoC Silicon Architect @ Intel Corporation Jan 2009 – Jan 2011 | Santa Clara, California, United States SoC Silicon Architect for embedded SoC platform. - Created a flexible architecture for 6 SoC derivatives - Create HW product requirement and SoC external architecture specification - Worked with cross site design teams on architecture, micro-architecture and IP evaluation - Worked with modeling team on HW/SW co-sim ### Principal Engineer, SoC architect and design lead @ AppliedMicro Jan 2006 – Jan 2009 | Sunnyvale, California, United States Lead a team of 7 engineers on the Ethernet Subsystem of a SoC platform - feature specification and documentation, external IP evaluation, architecture for the subsystem - RTL implementation, test planning, timing constraints; work with back-end on floor planning - coordinating global sites and cross function teams, such as marketing, design, verification, system teams and external vendor. ### Hardware ASIC Design Engineer @ Cisco Systems Jan 2002 – Jan 2006 | San Jose, California, United States - Worked on various multi-gigabit switch ASICs in Cisco’s Cat3K switches. - Led a redesign and cost reduction project, which became one of the most profitable product of Cisco - Full arch/micro-arch, design, verification, synthesis & timing experience. ## Education ### MSEE Purdue University ### Master of Science - MS in Physics University of Minnesota Duluth ### Bachelor of Science - BS in Electrical Engineering Nankai University ## Contact & Social - LinkedIn: https://linkedin.com/in/pubkathytan --- Source: https://flows.cv/kathytan JSON Resume: https://flows.cv/kathytan/resume.json Last updated: 2026-04-13