NCL Fall 2023 Competition

LiDAR FPGA design and verification and testing in the lab and in the field. Xilinx RF SoC FPGA design, synthesis, and simulation with Vivado.

RTL modeling, verification and synthesis of FPGA fabric components. Implemented Synopsys memory BIST for on-chip memories in a novel FPGA flow. FPGA design and verification for 16nm and 7nm FPGAs.

ASIC design of next generation camera video processor. Contributed in micro-architecture, design and verification. Designed and verified a serial interface in FPGA.