# Nima Soltani > AI @ Glean Location: Los Gatos, California, United States Profile: https://flows.cv/nimasoltani ## Work Experience ### Software Engineer @ Glean Jan 2024 – Present | Palo Alto, California, United States ### Machine Learning Architect @ Tome Jan 2023 – Jan 2024 | San Francisco, California, United States ### Founding Engineer @ Ghost Locomotion Jan 2017 – Jan 2022 - Developed computer vision algorithms for perception in an autonomous driving product, combining techniques in existing literature with physics-based first principles derivations to create Ghost’s unique approach to self-driving - Architected the initial prototypes the self-driving system, deriving the underlying math, and materializing its development plan, across the areas of perception, driving decisions and controllers - Built machine learning pipelines to select data, train and evaluate model performance - Provided insights to the machine learning systems team to build out Ghost’s custom data infrastructure - Developed initial HW specs for camera based on physics-based models to provide sufficiently good data for models ### Next Generation Sensor Algorithm Engineer @ Apple Jan 2015 – Jan 2017 | Cupertino - Developed algorithms to measure physiological signals in health sensors both from existing hardware and investigative prototypes, leading to the successful delivery of atrial fibrillation detection and sleep tracking on the Apple Watch - Deep-dived into sensor physics to enable accurate, effective algorithm development - Designed studies to root cause extremely rare failures - Conducted early-stage investigations of new health sensors exploring tradeoffs between user comfort, signal integrity and population level variation ### Research Assistant, Electrical Engineering @ Stanford University Jan 2011 – Jan 2015 - Spearheaded inter-disciplinary research in application of information theory and signal processing to neuroscience - Investigated the application of information theoretic measures for inferring the existence of signaling structures in the brain; in particular, how directed information can be used to infer the focus of seizures in epilepsy patients ### Intern @ Technicolor Jan 2012 – Jan 2012 | Palo Alto - Investigated use of biometric signals to gauge reactions to video for audience testing and content recommendation - Implemented shift-invariant sparse coding algorithm to analyze biometric signals - Designed and carried out experiments to collect biometric data using wearable sensors ### Signal Processing Intern @ Broadcom Jan 2010 – Jan 2010 | Sunnyvale, CA - Developed algorithms for estimating 60GHz wireless channel impulse responses using a MIMO 60GHz wireless channel measurement platform - Applied convex optimization and adaptive signal processing techniques to deal with the system’s non-idealities encountered such as mixer spurs and inter-modulation products - Performed laboratory measurements using high sampling rate arbitrary waveform generators and digital oscilloscopes, as well as vector network analyzers and spectrum analyzers ### GPU ASIC Engineering Intern @ NVIDIA Jan 2009 – Jan 2009 ### GPU ASIC Engineering Intern @ NVIDIA Jan 2008 – Jan 2008 - Wrote scripts to mirror Verilog RTL changes in the gate-level netlists on the latest generation GPUs, and ran formal verification between the RTL and the gate-level netlists to confirm accuracy - Traced through formal verification logs to address warnings and errors, and find logic that does not behave as intended - Performed timing closure in four partitions on the GPU, in partnership with the VLSI layout team to address setup, hold and transition timing violations ### IEEE 802.11n Research Assistant @ University of Waterloo Jan 2007 – Jan 2007 - Implemented the multi-rate channel coder/decoder for an IEEE 802.11A receiver using the Xilinx System Generator blockset in Simulink - Innovatively optimized the accuracy and size of the frame detection logic in the receiver - Developed, debugged and documented the baseband of an IEEE 802.11A transmitter and receiver platform to be used for algorithm verification ### Engineering Intern @ Marvell Semiconductor Jan 2007 – Jan 2007 - Wrote a peripheral input/output logic block in Verilog on a Xilinx Virtex4 FPGA to communicate with other devices on a board using SPI - Verified schematics and completed the layout of a 16-layer board, that included power, digital, baseband, and RF signals, using PADS Layout - Conducted qualifications testing for Bluetooth chips, using Agilent Vector Signal Generator and Rohde & Schwarz Spectrum Analyzer ### Software Developer @ RIM Jan 2006 – Jan 2006 - Wrote a C++ operator interface for National Instruments TestStand using MFC and the TestStand API to be used throughout RIM - Used C/C++ to develop application used internally that required quickly learning of software technologies, namely MFC, COM and LabWindows/CVI - Designed an asynchronous testing system for BlackBerry calibration tools providing assurance that devices are fit for wireless communication ### Software Developer @ RIM Jan 2005 – Jan 2005 ## Education ### Doctor of Philosophy (Ph.D.) in Electrical and Electronics Engineering Stanford University ### MS in Electrical Engineering Stanford University ### B.A.Sc. in Electrical Engineering with Option in Mathematics University of Waterloo ## Contact & Social - LinkedIn: https://linkedin.com/in/nima-soltani --- Source: https://flows.cv/nimasoltani JSON Resume: https://flows.cv/nimasoltani/resume.json Last updated: 2026-04-11