# Patrick L.

> iPhone SoC System Architect

Location: Cupertino, California, United States
Profile: https://flows.cv/patrickl1

25+ years of experience building exciting products: From game console, iPhone, HoloLens, to super computer. Wide range of experience in product definition, strategic roadmap, system architecture, SoC, GPU, DRAM architecture, power modeling and management, display and media, AIML, augmented reality, autonomous vehicle, etc.

## Work Experience
### iPhone SoC System Architect @ Apple
Jan 2021 – Present | Cupertino
Responsible for definition of SoC requirements such as power/performance, interface, DRAM, NAND, etc. Setting use cases and power/performance targets.

### Compute System Architect @ Zoox
Jan 2020 – Jan 2021 | Silicon Valley, California, United States
Autonomous vehicle compute system architecture, component and vendor selection, long term roadmap definition.

### Senior Director @ Microsoft
Jan 2019 – Jan 2020 | San Francisco Bay Area
- HoloLens to data center silicon technologies incubation
- mW to mega-watt system and silicon power modeling and management

Led a small team to work cross discipline in Project Maia (Athena). Performed TCO analysis and power management for warehouse-scale tera-parameter ML training.

### Computer Architect @ Apple
Jan 2018 – Jan 2019 | Cupertino
Apple M1 SoC system architecture

### iPhone Hardware Architect @ Apple
Jan 2013 – Jan 2018 | Cupertino, CA
iPhone system architect. Responsible for the top level architecture of four generations of shipping iPhones. Specialized in product definition, usage model, performance analysis, power and battery life modeling.

### Computer Architect @ Apple
Jan 2009 – Jan 2013 | Cupertino
Mobile GPU architect responsible for power management, power estimate, and performance analysis. Also worked on mobile DRAM architecture (LPDDR2, LPDDR3, and LPDDR4) including definition, specification, and performance and power analysis.

### PMTS @ AMD
Jan 2007 – Jan 2009
Graphics Products Group. Responsible for system architecture, roadmap, strategy, and product planning. Interested in computer graphics, multimedia, and system architecture.

### Design Manager @ AMD
Jan 2004 – Jan 2007
Managed a talented team in designing high performance memory fabric, DRAM controller (world first GDDR5 controller), system logic (power management and clock generation), design-for-power, and ASIC design flow.

### Staff Design Engineer @ AMD
Jan 2003 – Jan 2004
Lead designer in DDR2/GDDR3/GDDR4 memory controllers.

### Hardware Architect @ Broadcom
Jan 1999 – Jan 2003
Architecture and design definition. Specialized in computer security and video processing.

### MTS @ ArtX
Jan 1998 – Jan 1999

### MTS @ SGI
Jan 1995 – Jan 1998


## Education
### MSc in Computer Engineering
University of Southern California

### Bachelor's degree in Electrical and Electronics Engineering
The University of Hong Kong


## Contact & Social
- LinkedIn: https://linkedin.com/in/patricklaw7
- Portfolio: http://www.apple.com

---
Source: https://flows.cv/patrickl1
JSON Resume: https://flows.cv/patrickl1/resume.json
Last updated: 2026-04-13