# Pawan Agarwal

> RF/Analog/Mixed Signal Design

Location: San Jose, California, United States
Profile: https://flows.cv/pawanagarwal

16+years of enjoying architecting a variety of RF, Analog, and Mixed-Signal circuits and systems using FinFet, SiGe, and GaN processes. Recently worked on 200/100G data center links, Docsis4.0 cable home networks, and mmW beamforming arrays.

## Work Experience
### Analog, Mixed Signal Designer @ Marvell Technology
Jan 2025 – Present

### RFIC Design Manager @ MaxLinear
Jan 2022 – Present

### Principal RF/MS IC Design Engineer @ MaxLinear
Jan 2021 – Jan 2021

### Senior Staff RF/MS IC Design Engineer @ MaxLinear
Jan 2019 – Jan 2021

### Staff RF/MS IC Design Engineer @ MaxLinear
Jan 2017 – Jan 2019 | California

### Research Assistant @ Washington State University
Jan 2011 – Jan 2017 | Pullman, WA

### Research Intern @ MaxLinear
Jan 2014 – Jan 2014 | Irvine, CA

### Intern @ AppliedMicro
Jan 2012 – Jan 2012 | Sunnyvale, CA

### Senior Design Engineer @ Applied Micro
Jan 2011 – Jan 2011
Involved in designing High Speed analog and mixed signal circuits (e.g. PLL, DLL etc)

### Design Engineer @ Applied Micro
Jan 2009 – Jan 2011
Involved in designing High Speed analog and mixed signal circuits (e.g. PLL's sub blocks etc)


## Education
### B. Tech & M.Tech in Electrical, Electronics, Communications, and Computer Engineering
Indian Institute of Technology, Madras

### PhD in Wireless systems and integrated circuits design
Washington State University


## Contact & Social
- LinkedIn: https://linkedin.com/in/agarwalpawan

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Source: https://flows.cv/pawanagarwal
JSON Resume: https://flows.cv/pawanagarwal/resume.json
Last updated: 2026-04-13