# PRABHAVATHY KRISHNAKUMAR > High Speed Board design|X86 |ARM| FPGA|SOC based design |SI & PI|PDLC|HDLC|Microsoft,Intel,AnalogDevices,Broadcomm|GE-ECGMachine,ZOLL AED PMA verification, ADAS|PGMP|PMP|IEC standards|CE| Location: Sunnyvale, California, United States Profile: https://flows.cv/prabhavathykrishnakumar Summary Experienced electrical engineering professional with a passion for innovation and a strong background in Schematics design, PCB design, system architecture, digital circuits, and project management. Committed to achieving first-pass success and minimizing time-to-market through efficient prototyping processes. Known for project management approach and ability to integrate state-of-the-art technologies into viable products. - Project management - High-speed digital system design - PCB design and layout (2-24 layers) review - Signal and power integrity - RF Zigbee, ZWave, Bluetooth, - Architecture design - Design Analysis (Power, DC, AC, Signal integrity) - End-to-end prototyping Specialties: Board Design: High Speed Board design, Signal Integrity issues. Hardware Interfaces: PCIe Gen3, GigE, SPI, UART, SATA, I2C, CAN, LIN, eUSB2 Peripheral Devices: LPDDR5X, DDRx, FLASH, EEPROM, LCD, Display, HDMI, MIPI-CSI, AUDIO, I2S. Logic design: CPLD, FPGA, Timing Analysis. Tools: Cadence, Altium, Mentor graphics, CAM360, CREO ## Work Experience ### Senior Hardware Engineer @ Apple Jan 2025 – Present | Cupertino, CA ### Senior Project Manager @ HCLTech Jan 2023 – Present | United States Worked with Intel @ Santa Clara California for ERB, RVP and Intel SOC Board design & development Worked with Microsoft @ Redmond Washington for Surface Laptop on Platform design and development team. Currently working with Apple Client ### Senior Project Manager @ HCLTech Jan 2018 – Jan 2023 | Bengaluru, Karnataka, India o HW Test protocol preparation for HV, ECG, Safety, Current drawn & Approval from customer. o Design Failure Mode Effect Analysis of AED and identifies the Risk Mitigation Plan against those Failures. o Component De-rating analysis of AED and Rationale for Out of Margin components. o Design robustness through HALT testing and identify the Root causes of failure. o DFM changes and suggested the suitable changes in Gerber. Gerber review and Releases. o Single sourcing identification and finding the suitable parts used for production support. o PMA related documents for AED. Responsible for overall product sustenance activities. o Agile (PLM) Release for Manufacturing Change Order, Design Change order, DHF creation, Change Request and release process. o Worked for Medical customer @Zoll Corporation for their AED ### Senior Technical Professional @ Microsoft Jan 2024 – Jan 2025 | Redmond, Washington, United States ### Manufacturing Product Manager @ Johnson & Johnson Jan 2024 – Jan 2024 | Santa Clara County, California, United States PFMEA for RoboticARM medical devices, Risk analysis and Mitigation Plan for Class III Medical devices ### Senior Technical Architect @ Intel Corporation Jan 2023 – Jan 2023 | Santa Clara County, California, United States o Hardware design analysis and Architecture document preparation. Component selection for board design. o Check the COEUS Symbol creation against the Intel SOC ball map, Review and accept the final schematics symbol. o Schematics entry and design review of ERB and RVP’s. Layout guidelines and review for ERB and RVP Board design. o Prepared offering and demands across BU’s based on Demand of design. o Involved in Manufacturing team meeting for BOM release status and alternate parts for different variants in Intel SOC. BOM release w.r.t design in SPEED and Promote BOM for next stage. o Board Bring up test report review for PCB assembly. Prepare test plan and review with Intel’s customer. o Prototypes testing along with Intel validation team and execute the test for System integration testing. o Pre Silicon and Post Silicon Electrical Validation of Intel SOC team. ### Technical Architect @ Intel Corporation Jan 2020 – Jan 2023 | Bangalore Urban, Karnataka, India Responsible for schematics capture, layout Verification, BOM generating, and debugging and testing of boards / add-on cards / RVP and ERB designs for ICG, CCG, MVSHW, IFS teams. Collaborate with layout engineers, validation engineers, software engineers, firmware engineers, product engineers and other teams to resolve any engineering issues in early stage to ensure and enhance the quality of the products ### Senior Lead Quality Hardware @ Velankani Information Systems Ltd Jan 2015 – Jan 2018 | Bengaluru, Karnataka, India Smart meter (Industrial), BMS Tracking System (Automotive) and Wi-Fi Access Point (Industrial). o Prototype or proof concept of Smart meter end to end product requirements o Detailing of System requirements, applicable standards assessment generation o Generate electrical requirements, electrical high level design, schematics and design analysis o PCB layout design and vendor interaction for proto boards design o Board testing, hardware-software integration, system integration o Feasibility Study, Risk Mitigation, FMEA, Power Analysis, Signal Integrity for boards o Compliance testing – EMI/EMC, Electrical Safety and IP54 testing o Field trial and Firmware upgradation over air for software issues and retesting. o Internal Quality Auditor for Engineering changes in the design during Mass Production. o ICT, FCT testing support for the product design during Manufacturing o Bugzilla for report and track the Field issues of various Product design. o Tortoise SVN for all design related changes and implementation o Prepare technical documentation including product specifications, layout instructions, test procedures, test reports o Products to engineering specifications, EMC and energy regulations, and customer performance expectations ### Project Lead Hardware design @ Sienna ECAD Technologies Private Limited Jan 2013 – Jan 2015 | Bengaluru, Karnataka, India High-End FPGA board (Acceletrade-Industrial), Controller Board and Printer Board Design for next generation ECG Machine (GE Healthcare-Medical). o Customer requirement generation and product specifications drafting o Block Diagram, Schematics entry, BOM Generation, Layout Guidelines, PCB review, Gerber review. o Design Progress and weekly review meeting along with customer. o PCB Layer stack-up identification and Manufacturer feasibility. o PCB Manufacturing and Assembly co-ordination for the Controller board and Printer board. o Board bring-up testing and System integrated testing along with customer. o Prototype build and pilot run support for manufacturing the product. o Identify the Programmable Logic blocks, Memory allocation for BPI flash & DDR3. o Placement and Routing for the Application specific device. o Programming the device to enable the power on sequencing. o Optimising the power during full load of operation. o Board bring-up testing and System integrated testing along with customer software team. o Support for Prototype build. Provide the Technical documents and strong technical supports to the contract manufacturers o Support for Production during the product sample and production stages of IP camera modules, Servers, WIFI routers ### Project Lead : PES @ Mistral Solutions Pvt. Ltd Jan 2011 – Jan 2013 | Bangalore System requirement for design, Components selection, Schematics design. Hardware design analysis such as AC, DC, Thermal analysis.Schematics design entry.Part field updation, Bill of materials optimization. Layout guidelines, Verification for standards such as DDR2, HDMI, SATA,PCIe, SPI, I2C,USB and High speed signals. Board Bring-up activities and Hardware Testing and Debugging the design. Verification for the board design. Complete product deliver to ADI,NXP.etc.. ### Project Lead - Hardware designs @ WiFi Networks Jan 2008 – Jan 2010 | Bangalore Architecture design, Components selection, Schematics design. Vendor Interaction for Choose design. Power Budgeting, Cost Budget Hardware Testing and Debugging the design. Part field updation, Bill of materials Creation. Review for PCB Layout. & Gerber review. Hardware board bring-up's for the designs. Verification of Hardware design through test codes along with BSP/ Driver application development team. ### Lead Technical Engineer @ Midas Communication Technologies Jan 2001 – Jan 2008 Base station distributor (Telecom). o Layout design, BOM creation, Components sourcing o PCBA assembly and Testing o Transfer of Technology for Mass production, documentation for ECN/ECR etc. ## Education ### Engineer’s Degree in Computer science & engg Anna University Chennai Jan 2003 – Jan 2006 ### M.B.A in Project Management Alagappa University, Alagappa Nagar, Karaikudi Jan 2009 – Jan 2011 ### Diploma in Electronics & Communication Engineering in 83% Institute of Road Transport polytechnic Jan 1993 – Jan 1996 ## Contact & Social - LinkedIn: https://www.linkedin.com/in/prabhavathy-krishnakumar-58462814 --- Source: https://flows.cv/prabhavathykrishnakumar JSON Resume: https://flows.cv/prabhavathykrishnakumar/resume.json Last updated: 2026-04-07