# Ravindra Ganti > Co-Founder, CTO & Board of Directors, XgenSilicon Inc. | <​Ex-Synopsys, Lockheed Martin, Intel, Marvell​> l AI/ML/Multimodality LLMs/AI HW | Location: Santa Clara, California, United States Profile: https://flows.cv/ravindraganti As Co-Founder and CTO at XgenSilicon since February 2025, I lead engineering initiatives in a dynamic startup environment. My work focuses on delivering custom ASICs for AI Models; driving innovation through the development of end-to-end ASIC Compiler, end-to-end AI automation flows to streamline custom AI model adoption, ASIC development, verification, and sign-off processes. With over a year in this role and previous experience at Synopsys, Lockheed Martin, and Intel, I specialize in transforming AI and ML research into advanced silicon solutions. My expertise includes ML-based ASIC tape-out flows, and cutting-edge hardware methodologies, all aimed at accelerating ASIC tape-out to catch up the pace of AI Models development and enabling efficient, scalable engineering solutions. ## Work Experience ### Co-Founder, CTO & VP of Engineering @ XgenSilicon Jan 2025 – Present | Santa Clara, CA • Co-Founder, driving engineering initiatives in a fast-paced startup. • Led the development process from concept to prototyping, focusing on architecture and product requirements. • Architected automation flows to accelerate hardware development, verification , debug and sign-off cycles. • Architected Custom ML Compiler, built custom Instruction Set Simulator and ML Compiler, contributing to innovative product solutions. * Architected and built scalable, and modular UVM test bench at block level and SoC level. ### Sr. Architect @ Synopsys Inc Jan 2024 – Jan 2025 | Sunnyvale, California, United States Contributed to simulation technologies to accelerate SoC Verification cycle and turn-around-time to sign-off. ### Principal Engineer @ Lockheed Martin Jan 2023 – Jan 2024 | Sunnyvale, California, United States ### Verification Lead @ Intel Jan 2021 – Jan 2023 | San Jose, California, United States ### Sr. Design Verification Manager @ Synaptics Incorporated Jan 2021 – Jan 2021 | San Jose, California, United States ### Principal Engineer @ Luminous Computing Jan 2021 – Jan 2021 | Mountain View, California, United States ### Verification Lead & Engineering Manager @ Intel Corporation Jan 2016 – Jan 2021 | San Jose, CA ### Staff Design Verification Engineer @ Synopsys Inc Jan 2012 – Jan 2016 | Mountain View, CA ### Staff Verification Engineer @ Marvell Jan 2011 – Jan 2012 | Santa Clara, CA ### Sr. Design Verification Engineer @ Synopsys Inc Jan 2007 – Jan 2011 | Mountain View, CA ### Sr.R&D Engineer @ Synopsys Inc Jan 2001 – Jan 2007 | Bengaluru, Karnataka, India ## Education ### Master of Technology in Computer Engineering Indian Institute of Technology, Kharagpur ### Bachelor of Engineering in Electronics & Communications Andhra University ## Contact & Social - LinkedIn: https://linkedin.com/in/ravindraganti - Portfolio: https://xgensilicon.ai --- Source: https://flows.cv/ravindraganti JSON Resume: https://flows.cv/ravindraganti/resume.json Last updated: 2026-04-13