Corporate architecture software developer at Diagnostics Engineering Group (DEG), working on making software to test, validate and find faults in hardware components like CPU, Memory, Network, Storage, GPU, etc.

Corporate architecture software developer at Diagnostics Engineering Group (DEG), working on making software to test, validate and find faults in hardware components like CPU, Memory, Network, Storage, GPU, etc.

Instructed Fundamental of Logic and Design class using Verilog on the Xilinx Artix-7 FPGA board and increased the project critical thinking performance and completeness of my 100 students respectively by 85% and 32.5%

● Implementing modified Selective Search on Python to replace exhaustive search to find pairwise energy without

accuracy loss which will produce better segmentation to be put into AlexNet-based RCNN

● Implementing Markov Random Field energy minimization method on Python for finding image segmentation using

both unary and pairwise information to reduce energy consumption and increase the accuracy

● Developed a hypothesis applying energy minimization method to improve object recognition accuracy and beat the

state-of-the-art YOLO runtime 0.023 secs which will be added as computer vision toolbox to group’s Nature Journal