# Satish B.

> Design Verification Architect | Head of Verification @ Intuitive Surgical Robotics

Location: Sunnyvale, California, United States
Profile: https://flows.cv/satishb

I bring over 20 years of verification expertise, specializing in leading teams and delivering complex SoC designs with quality and efficiency. Skilled in functional verification and UVM, I excel in executing large-scale projects. Passionate about nurturing engineering talent and advancing verification methodologies, I consistently achieve successful tapeouts with excellent post-silicon results.

## Work Experience
### Sr Manager Design Verification @ Intuitive
Jan 2023 – Present | Sunnyvale
Head of Design Verification.

### Design Verification Manager @ Intuitive
Jan 2019 – Jan 2023 | Sunnyvale

### Verification Lead @ Intel Corporation
Jan 2018 – Jan 2019 | San Jose
5G Modem Verification

### Staff Engineer @ Qualcomm
Jan 2007 – Jan 2018 | Greater San Diego Area
DV chip lead for Audio Codec SoCs.
3G/4G/5G QDSP5 Modem sub-system DV.
Verified various ARM Cores/Sub-Systems/NOCs of mobile SoC (Snapdragon series)

### Design/Verification Engineer @ Maxwell Technologies
Jan 2005 – Jan 2007
VHDL Design and verification of single computers for space. Verified ECC and TMR functionality  of PowerPC750FX processor bases sub system.

### Research Enginner @ Mississippi State University
Jan 2002 – Jan 2004 | Civil Engineering
Simulate wind pattern using electro-magets to test the stability of metal roofings.


## Education
### M.S in Electrical Engineering
Mississippi State University

### Bachelor of Engineering in Electronics and Communication Engineering
University of Madras

### Vidya Mandir


## Contact & Social
- LinkedIn: https://linkedin.com/in/satish-b-4a898415

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Source: https://flows.cv/satishb
JSON Resume: https://flows.cv/satishb/resume.json
Last updated: 2026-04-13