# Shantanu G.

> Product  Engineering

Location: Milpitas, California, United States
Profile: https://flows.cv/shantanug

Innovative technology and engineering leader with over 15 years of experience in the semiconductor industry. I excel as both a hands-on individual contributor and a strategic leader, specializing in driving solutions for complex product challenges, including New Product Introductions (NPI), Product Test, DFTs, Quality, and Cost for advanced chip technologies.
My expertise is rooted in a fundamental understanding of system-level design and a proactive, data-driven approach. I leverage advanced skills in failure analysis and manufacturing data analysis to develop robust, long-term solutions that significantly improve manufacturing costs, enhance quality, and act as a force multiplier for the entire engineering organization.

## Work Experience
### Technologist Product Engineering @ Sandisk
Jan 2025 – Present

### Technologist Product Engineering @ Western Digital
Jan 2019 – Jan 2025
Client and Enterprise SSD
Lead testing and productization of Gen 6/8 3D NAND for Client and Enterprise SSDs.

SSD and Mobile Memory Systems Design Validation
Led validation of SSD and mobile memory system firmware, overseeing low-level NAND sequences and feature bring-up.

Advanced Memory Group 
Led testing and productization of Western Digital's first 4-bit per cell Gen 4 3D NAND, improving memory die quality and reducing test costs.

### Principal Engineer Product Engineering @ Western Digital
Jan 2017 – Jan 2019
Advanced Memory Group
Developed test flows for automotive-grade NAND Flash memory on 64-layer TLC 3D NAND.

Client SSD Products
Designed test flow architecture for 64-layer TLC 3D NAND in SSDs.

### Staff Product Engineering @ Western Digital
Jan 2016 – Jan 2016
Embedded Products
Led the bring-up of ATE test hardware and prototypes for SanDisk’s first UFS mobile product.

### Senior Product Engineer @ Sandisk
Jan 2013 – Jan 2016
Embedded Products
Led the development of memory and system test flows for SanDisk's 15nm TLC Flash-based eMMC 5.0/5.1 products.

### Product Engineer II- NAND Flash Memory @ Micron Technology
Jan 2009 – Jan 2013 | Boise, Idaho Area
Supported the development of 20nm MLC NAND Flash Memory through test validation and design simulation.
Improved product quality via failure analysis and corrective action implementation.
Led the read-time characterization project, improving latency and product performance.

### Graduate Research Assistant @ Boise State University
Jan 2008 – Jan 2009


## Education
### Masters in Electrical Engineering
Boise State University
Jan 2006 – Jan 2009

### UCSC Silicon Valley Extension
Jan 2017 – Jan 2017


## Contact & Social
- LinkedIn: https://www.linkedin.com/in/sgupta1125

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Source: https://flows.cv/shantanug
JSON Resume: https://flows.cv/shantanug/resume.json
Last updated: 2026-04-07