# Thomas Yeh

> Senior Software Engineer

Location: San Jose, California, United States
Profile: https://flows.cv/thomasyeh

Staff Software Engineer specializing in hardware–software integration and automation.
I design and optimize C++ and Node.js frameworks that control FPGA workflows — from configuration and runtime management to automated validation and remote operation across distributed systems. My work spans multi-threaded performance tuning, cross-CPU portability (x86/ARM), and GitLab CI/CD automation for scalable regression and deployment.

I also leverage AI-assisted code optimization and static analysis to improve reliability and developer efficiency. Collaborating closely with hardware, verification, and application engineering teams, I bridge low-level FPGA control with high-level service orchestration to deliver faster, more robust hardware validation and customer success.

## Work Experience
### Staff Software Engineer @ Synopsys Inc
Jan 2022 – Present | United States
▪ Designed and implemented C++ frameworks to control FPGA hardware workflows, including configuration, bitstream programming, runtime management, and automated validation sequences.

▪ Developed remote control capabilities for FPGA systems across distributed environments, enabling efficient remote testing and debugging.

▪ Optimized performance of the C++ control framework through multi-threaded execution and asynchronous task scheduling, improving throughput and reducing latency under load.

▪ Ported and validated existing tools across multiple CPU architectures (x86, ARM, and embedded platforms) to ensure cross-platform compatibility and consistent performance.

▪ Established GitLab CI/CD pipelines to automate regression testing, artifact management, and deployment of FPGA validation utilities.

▪ Integrated cross-team code-quality tools into CI/CD pipelines to enforce automated linting, testing, and static analysis before merges.

▪ Leveraged AI-assisted code optimization (LLM-based reviewers and static analysis insights) to enhance maintainability, performance, and code readability.

▪ Collaborated closely with Application Engineers (AEs) to reproduce and debug complex customer issues, bridging engineering and field operations for faster root-cause analysis and issue resolution.
Partnered with hardware and verification teams to streamline FPGA bring-up and unify software–hardware integration workflows.

### Software Engineer @ Supermicro
Jan 2015 – Jan 2022 | San Jose
Full-Stack
▪ Design the new process and web service for production.
▪ Migrate the old classic asp service to Node.js service and React JavaScript.
▪ Migrate the JavaScript to typescript.
▪ Deploy Kubernetes cluster for DB and application.
▪ Maintain Kubernetes cluster operation.
▪ Deploy CI/CD pipeline for the service.
▪ Build and configure the docker image on Kubernetes in production environment.
▪ Implement Cassandra DB and Elasticsearch log system for tracking and analyze the raw data from server.
▪ Design Kafka message queue system for syncing the DB between different country. 


Hardware:
▪ Responsible for the design and verification of server SAS3 storage products.
▪ Developed a firmware driver with C to control the customized circuit boards by I2C and SPI bus.
▪ Implemented shell script codes to control testing instruments to provide automated testing.
▪ Optimized the verification process of the storage system replaced the manual check and improved the process by 5x.
▪  Developed JBOD application for the storage system by C on Linux server to monitor and control the storage system.


## Education
### Master’s Degree in Electrical Engineering
San José State University

### Bachelor of Science in Electrical Engineering
Yuan Ze University


## Contact & Social
- LinkedIn: https://linkedin.com/in/thomas-yeh
- Portfolio: http://thomasyeh.net/resume/

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Source: https://flows.cv/thomasyeh
JSON Resume: https://flows.cv/thomasyeh/resume.json
Last updated: 2026-04-12